mbox series

[v2,00/16] target/mips: Boring code reordering + add "translate.h"

Message ID 20201214183739.500368-1-f4bug@amsat.org (mailing list archive)
Headers show
Series target/mips: Boring code reordering + add "translate.h" | expand

Message

Philippe Mathieu-Daudé Dec. 14, 2020, 6:37 p.m. UTC
Hi,

This series contains the patches previously sent in "Boring code
reordering" [1] and "Add translate.h and fpu_translate.h headers"
[2]. I removed the patches merged and addressed Richard review
comments.

Missing review: 1 3-5 9-11 14 15

Available as:
  https://gitlab.com/philmd/qemu/-/commits/refactor_translate_h

Regards,

Phil.

Based-on: https://gitlab.com/philmd/qemu.git tags/mips-next
Supersedes: <20201206233949.3783184-1-f4bug@amsat.org>
Supersedes: <20201207235539.4070364-1-f4bug@amsat.org>

[1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg764551.html
[2] https://www.mail-archive.com/qemu-devel@nongnu.org/msg764828.html

Philippe Mathieu-Daudé (16):
  target/mips: Inline cpu_state_reset() in mips_cpu_reset()
  target/mips: Extract FPU helpers to 'fpu_helper.h'
  target/mips: Add !CONFIG_USER_ONLY comment after #endif
  target/mips: Remove consecutive CONFIG_USER_ONLY ifdefs
  target/mips: Extract common helpers from helper.c to common_helper.c
  target/mips: Rename helper.c as tlb_helper.c
  target/mips: Fix code style for checkpatch.pl
  target/mips: Move mmu_init() functions to tlb_helper.c
  target/mips: Rename translate_init.c as cpu-defs.c
  target/mips: Replace gen_exception_err(err=0) by gen_exception_end()
  target/mips: Replace gen_exception_end(EXCP_RI) by
    gen_rsvd_instruction
  target/mips/translate: Extract DisasContext structure
  target/mips/translate: Add declarations for generic code
  target/mips: Declare generic FPU functions in 'translate.h'
  target/mips: Extract FPU specific definitions to translate.h
  target/mips: Only build TCG code when CONFIG_TCG is set

 target/mips/fpu_helper.h                      |  59 ++
 target/mips/internal.h                        |  52 +-
 target/mips/translate.h                       | 166 ++++
 linux-user/mips/cpu_loop.c                    |   1 +
 target/mips/cpu.c                             | 243 ++++-
 target/mips/fpu_helper.c                      |   1 +
 target/mips/gdbstub.c                         |   1 +
 target/mips/kvm.c                             |   1 +
 target/mips/machine.c                         |   1 +
 target/mips/msa_helper.c                      |   1 +
 target/mips/op_helper.c                       |   2 +-
 target/mips/{helper.c => tlb_helper.c}        | 260 ++---
 target/mips/translate.c                       | 897 ++++++++----------
 .../{translate_init.c.inc => cpu-defs.c.inc}  |  50 +-
 target/mips/meson.build                       |  10 +-
 15 files changed, 903 insertions(+), 842 deletions(-)
 create mode 100644 target/mips/fpu_helper.h
 create mode 100644 target/mips/translate.h
 rename target/mips/{helper.c => tlb_helper.c} (87%)
 rename target/mips/{translate_init.c.inc => cpu-defs.c.inc} (96%)

Comments

Richard Henderson Dec. 15, 2020, 2:09 p.m. UTC | #1
On 12/14/20 12:37 PM, Philippe Mathieu-Daudé wrote:
> gen_reserved_instruction() is easier to read than
> generate_exception_end(ctx, EXCP_RI), replace it.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  target/mips/translate.c | 724 ++++++++++++++++++++--------------------
>  1 file changed, 362 insertions(+), 362 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
no-reply@patchew.org Dec. 15, 2020, 2:24 p.m. UTC | #2
Patchew URL: https://patchew.org/QEMU/20201214183739.500368-1-f4bug@amsat.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20201214183739.500368-1-f4bug@amsat.org
Subject: [PATCH v2 00/16] target/mips: Boring code reordering + add "translate.h"

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 - [tag update]      patchew/20201204081209.360524-1-ganqixin@huawei.com -> patchew/20201204081209.360524-1-ganqixin@huawei.com
 * [new tag]         patchew/20201214183739.500368-1-f4bug@amsat.org -> patchew/20201214183739.500368-1-f4bug@amsat.org
Switched to a new branch 'test'
b698b2c target/mips: Only build TCG code when CONFIG_TCG is set
2b7ceb2 target/mips: Extract FPU specific definitions to translate.h
c8fb9ca target/mips: Declare generic FPU functions in 'translate.h'
9c72d0c target/mips/translate: Add declarations for generic code
d8f6d1d target/mips/translate: Extract DisasContext structure
e96a937 target/mips: Replace gen_exception_end(EXCP_RI) by gen_rsvd_instruction
bffae20 target/mips: Replace gen_exception_err(err=0) by gen_exception_end()
7319775 target/mips: Rename translate_init.c as cpu-defs.c
b25602b target/mips: Move mmu_init() functions to tlb_helper.c
6219caf target/mips: Fix code style for checkpatch.pl
5be87c5 target/mips: Rename helper.c as tlb_helper.c
051e87c target/mips: Extract common helpers from helper.c to common_helper.c
d10b7c7 target/mips: Remove consecutive CONFIG_USER_ONLY ifdefs
8a5a0b7 target/mips: Add !CONFIG_USER_ONLY comment after #endif
a129631 target/mips: Extract FPU helpers to 'fpu_helper.h'
02da990 target/mips: Inline cpu_state_reset() in mips_cpu_reset()

=== OUTPUT BEGIN ===
1/16 Checking commit 02da9907b334 (target/mips: Inline cpu_state_reset() in mips_cpu_reset())
2/16 Checking commit a129631d782b (target/mips: Extract FPU helpers to 'fpu_helper.h')
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

total: 0 errors, 1 warnings, 193 lines checked

Patch 2/16 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/16 Checking commit 8a5a0b7f9c26 (target/mips: Add !CONFIG_USER_ONLY comment after #endif)
4/16 Checking commit d10b7c71feb1 (target/mips: Remove consecutive CONFIG_USER_ONLY ifdefs)
5/16 Checking commit 051e87cd7a13 (target/mips: Extract common helpers from helper.c to common_helper.c)
ERROR: space prohibited after that '&' (ctx:WxW)
#41: FILE: target/mips/cpu.c:53:
+    cu = (v >> CP0St_CU0) & 0xf;
                           ^

ERROR: space prohibited after that '&' (ctx:WxW)
#42: FILE: target/mips/cpu.c:54:
+    mx = (v >> CP0St_MX) & 0x1;
                          ^

ERROR: space prohibited after that '&' (ctx:WxW)
#43: FILE: target/mips/cpu.c:55:
+    ksu = (v >> CP0St_KSU) & 0x3;
                            ^

ERROR: space prohibited after that '&' (ctx:WxW)
#70: FILE: target/mips/cpu.c:82:
+        uint32_t ksux = (1 << CP0St_KX) & val;
                                         ^

ERROR: space prohibited after that '&' (ctx:WxW)
#78: FILE: target/mips/cpu.c:90:
+        mask &= ~(((1 << CP0St_SR) | (1 << CP0St_NMI)) & val);
                                                        ^

ERROR: space prohibited after that '&' (ctx:WxW)
#105: FILE: target/mips/cpu.c:117:
+        mask &= ~((1 << CP0Ca_WP) & val);
                                   ^

ERROR: space prohibited after that '&' (ctx:WxW)
#110: FILE: target/mips/cpu.c:122:
+    if ((old ^ env->CP0_Cause) & (1 << CP0Ca_DC)) {
                                ^

ERROR: space prohibited after that '&' (ctx:WxW)
#120: FILE: target/mips/cpu.c:132:
+        if ((old ^ env->CP0_Cause) & (1 << (CP0Ca_IP + i))) {
                                    ^

total: 8 errors, 0 warnings, 433 lines checked

Patch 5/16 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

6/16 Checking commit 5be87c54eeb1 (target/mips: Rename helper.c as tlb_helper.c)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#36: 
rename from target/mips/helper.c

total: 0 errors, 1 warnings, 17 lines checked

Patch 6/16 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
7/16 Checking commit 6219caf94f98 (target/mips: Fix code style for checkpatch.pl)
8/16 Checking commit b25602b6f0ef (target/mips: Move mmu_init() functions to tlb_helper.c)
9/16 Checking commit 73197755e834 (target/mips: Rename translate_init.c as cpu-defs.c)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#18: 
rename from target/mips/translate_init.c.inc

total: 0 errors, 1 warnings, 8 lines checked

Patch 9/16 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/16 Checking commit bffae20e0c6f (target/mips: Replace gen_exception_err(err=0) by gen_exception_end())
11/16 Checking commit e96a9374e116 (target/mips: Replace gen_exception_end(EXCP_RI) by gen_rsvd_instruction)
12/16 Checking commit d8f6d1d52d0d (target/mips/translate: Extract DisasContext structure)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#76: 
new file mode 100644

total: 0 errors, 1 warnings, 100 lines checked

Patch 12/16 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/16 Checking commit 9c72d0c372dd (target/mips/translate: Add declarations for generic code)
14/16 Checking commit c8fb9ca67251 (target/mips: Declare generic FPU functions in 'translate.h')
15/16 Checking commit 2b7ceb2fc467 (target/mips: Extract FPU specific definitions to translate.h)
16/16 Checking commit b698b2cbfecf (target/mips: Only build TCG code when CONFIG_TCG is set)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20201214183739.500368-1-f4bug@amsat.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Philippe Mathieu-Daudé Dec. 15, 2020, 7 p.m. UTC | #3
On 12/15/20 3:24 PM, no-reply@patchew.org wrote:
> Patchew URL: https://patchew.org/QEMU/20201214183739.500368-1-f4bug@amsat.org/
> 
> 
> === OUTPUT BEGIN ===
> 1/16 Checking commit 02da9907b334 (target/mips: Inline cpu_state_reset() in mips_cpu_reset())
> 2/16 Checking commit a129631d782b (target/mips: Extract FPU helpers to 'fpu_helper.h')
> WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
> #42: 
> new file mode 100644
> 
> total: 0 errors, 1 warnings, 193 lines checked
> 
> Patch 2/16 has style problems, please review.  If any of these errors
> are false positives report them to the maintainer, see
> CHECKPATCH in MAINTAINERS.
> 3/16 Checking commit 8a5a0b7f9c26 (target/mips: Add !CONFIG_USER_ONLY comment after #endif)
> 4/16 Checking commit d10b7c71feb1 (target/mips: Remove consecutive CONFIG_USER_ONLY ifdefs)
> 5/16 Checking commit 051e87cd7a13 (target/mips: Extract common helpers from helper.c to common_helper.c)
> ERROR: space prohibited after that '&' (ctx:WxW)
> #41: FILE: target/mips/cpu.c:53:
> +    cu = (v >> CP0St_CU0) & 0xf;
>                            ^
> 
> ERROR: space prohibited after that '&' (ctx:WxW)
> #42: FILE: target/mips/cpu.c:54:
> +    mx = (v >> CP0St_MX) & 0x1;
>                           ^
> 
> ERROR: space prohibited after that '&' (ctx:WxW)
> #43: FILE: target/mips/cpu.c:55:
> +    ksu = (v >> CP0St_KSU) & 0x3;
>                             ^
> 
> ERROR: space prohibited after that '&' (ctx:WxW)
> #70: FILE: target/mips/cpu.c:82:
> +        uint32_t ksux = (1 << CP0St_KX) & val;
>                                          ^
> 
> ERROR: space prohibited after that '&' (ctx:WxW)
> #78: FILE: target/mips/cpu.c:90:
> +        mask &= ~(((1 << CP0St_SR) | (1 << CP0St_NMI)) & val);
>                                                         ^
> 
> ERROR: space prohibited after that '&' (ctx:WxW)
> #105: FILE: target/mips/cpu.c:117:
> +        mask &= ~((1 << CP0Ca_WP) & val);
>                                    ^
> 
> ERROR: space prohibited after that '&' (ctx:WxW)
> #110: FILE: target/mips/cpu.c:122:
> +    if ((old ^ env->CP0_Cause) & (1 << CP0Ca_DC)) {
>                                 ^
> 
> ERROR: space prohibited after that '&' (ctx:WxW)
> #120: FILE: target/mips/cpu.c:132:
> +        if ((old ^ env->CP0_Cause) & (1 << (CP0Ca_IP + i))) {
>                                     ^
> 
> total: 8 errors, 0 warnings, 433 lines checked
> 
> Patch 5/16 has style problems, please review.  If any of these errors
> are false positives report them to the maintainer, see
> CHECKPATCH in MAINTAINERS.

All pre-existing issues (code moved).