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[83.57.169.13]) by smtp.gmail.com with ESMTPSA id e4sm15520107wrw.96.2021.01.29.17.52.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Jan 2021 17:52:29 -0800 (PST) Sender: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , kvm@vger.kernel.org, Peter Maydell , Fam Zheng , Thomas Huth , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Claudio Fontana , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v5 00/11] Support disabling TCG on ARM (part 2) Date: Sat, 30 Jan 2021 02:52:16 +0100 Message-Id: <20210130015227.4071332-1-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Cover from Samuel Ortiz from (part 1) [1]: This patchset allows for building and running ARM targets with TCG disabled. [...] The rationale behind this work comes from the NEMU project where we're trying to only support x86 and ARM 64-bit architectures, without including the TCG code base. We can only do so if we can build and run ARM binaries with TCG disabled. v5: - addressed Paolo/Richard/Thomas review comments from v4 [5]. v4 almost 2 years later... [2]: - Rebased on Meson - Addressed Richard review comments - Addressed Claudio review comments v3 almost 18 months later [3]: - Rebased - Addressed Thomas review comments - Added Travis-CI job to keep building --disable-tcg on ARM v2 [4]: - Addressed review comments from Richard and Thomas from v1 [1] Regards, Phil. [1]: https://lists.gnu.org/archive/html/qemu-devel/2018-11/msg02451.html [2]: https://www.mail-archive.com/qemu-devel@nongnu.org/msg689168.html [3]: https://www.mail-archive.com/qemu-devel@nongnu.org/msg641796.html [4]: https://lists.gnu.org/archive/html/qemu-devel/2019-08/msg05003.html [5]: https://www.mail-archive.com/qemu-devel@nongnu.org/msg746041.html Philippe Mathieu-Daudé (9): exec: Restrict TCG specific headers default-configs: Remove unnecessary SEMIHOSTING selection target/arm: Restrict ARMv4 cpus to TCG accel target/arm: Restrict ARMv5 cpus to TCG accel target/arm: Restrict ARMv6 cpus to TCG accel target/arm: Restrict ARMv7 R-profile cpus to TCG accel target/arm: Restrict ARMv7 M-profile cpus to TCG accel target/arm: Reorder meson.build rules .travis.yml: Add a KVM-only Aarch64 job Samuel Ortiz (1): target/arm: Do not build TCG objects when TCG is off Thomas Huth (1): target/arm: Make m_helper.c optional via CONFIG_ARM_V7M default-configs/devices/aarch64-softmmu.mak | 1 - default-configs/devices/arm-softmmu.mak | 28 -------- include/exec/helper-proto.h | 2 + target/arm/cpu.h | 12 ---- hw/arm/realview.c | 7 +- target/arm/cpu_tcg.c | 4 +- target/arm/helper.c | 7 -- target/arm/m_helper-stub.c | 73 +++++++++++++++++++++ .travis.yml | 32 +++++++++ hw/arm/Kconfig | 66 +++++++++++++++++-- target/arm/meson.build | 28 +++++--- 11 files changed, 196 insertions(+), 64 deletions(-) create mode 100644 target/arm/m_helper-stub.c