From patchwork Thu May 20 14:56:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Edmondson X-Patchwork-Id: 12270757 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA7BFC433ED for ; Thu, 20 May 2021 15:03:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A16FE61246 for ; Thu, 20 May 2021 15:03:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238934AbhETPE0 (ORCPT ); Thu, 20 May 2021 11:04:26 -0400 Received: from forward1-smtp.messagingengine.com ([66.111.4.223]:54219 "EHLO forward1-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240141AbhETPEI (ORCPT ); Thu, 20 May 2021 11:04:08 -0400 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailforward.nyi.internal (Postfix) with ESMTP id 1827A19409BD; Thu, 20 May 2021 10:56:51 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Thu, 20 May 2021 10:56:51 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :message-id:mime-version:subject:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; bh=1RuXScUYzcGIpx3b8 iFAVEDzYE0Pc6TLx+tOKwThO3g=; b=EakPvUnCYOg3KzbxK+3agXEvK8p6cKvpF E6KUYj7YyCERSqBtNAVZ8EHWPpK17aadwSrxa1XYlVGcjV283vl3O32ww79Q/cyM kw7XEay91Q7g33yITV3Gx6mOjBJYhuVm8uAFNIahwn9SrSONEKFsYw14LwryxGrB 1UskGMsXA+zxzeyMBUWwIWls4svjgzXhJTkd21Qk/a6JZuO/F+G/1O+YzaRysv8a yvUHhWftyI0TCcXIuD1H936au+paMMBzciJGGm+8yNowLVa2vvGJ+kDRjyYRobrT dwFOMEkgTqUAU+BayqHkW8OWZMpEPebulOrksph1uKidLdPCNSjuw== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrvdejuddgkeefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffoggfgsedtkeertdertddtnecuhfhrohhmpeffrghvihguucfg ughmohhnughsohhnuceouggrvhhiugdrvggumhhonhgushhonhesohhrrggtlhgvrdgtoh hmqeenucggtffrrghtthgvrhhnpeduhfetvdfhgfeltddtgeelheetveeufeegteevtddu iedvgeejhfdukeegteehheenucfkphepkedurddukeejrddviedrvdefkeenucevlhhush htvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpegurghvihgurdgvughm ohhnughsohhnsehorhgrtghlvgdrtghomh X-ME-Proxy: Received: from disaster-area.hh.sledj.net (disaster-area.hh.sledj.net [81.187.26.238]) by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 May 2021 10:56:49 -0400 (EDT) Received: from localhost (disaster-area.hh.sledj.net [local]) by disaster-area.hh.sledj.net (OpenSMTPD) with ESMTPA id 7d490b61; Thu, 20 May 2021 14:56:47 +0000 (UTC) From: David Edmondson To: qemu-devel@nongnu.org Cc: kvm@vger.kernel.org, Eduardo Habkost , Paolo Bonzini , Marcelo Tosatti , Richard Henderson , Babu Moger , David Edmondson Subject: [RFC PATCH 0/7] Support protection keys in an AMD EPYC-Milan VM Date: Thu, 20 May 2021 15:56:40 +0100 Message-Id: <20210520145647.3483809-1-david.edmondson@oracle.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org AMD EPYC-Milan CPUs introduced support for protection keys, previously available only with Intel CPUs. AMD chose to place the XSAVE state component for the protection keys at a different offset in the XSAVE state area than that chosen by Intel. To accommodate this, modify QEMU to behave appropriately on AMD systems, allowing a VM to properly take advantage of the new feature. Further, avoid manipulating XSAVE state components that are not present on AMD systems. The code in patch 6 that changes the CPUID 0x0d leaf is mostly dumped somewhere that seemed to work - I'm not sure where it really belongs. David Edmondson (7): target/i386: Declare constants for XSAVE offsets target/i386: Use constants for XSAVE offsets target/i386: Clarify the padding requirements of X86XSaveArea target/i386: Prepare for per-vendor X86XSaveArea layout target/i386: Introduce AMD X86XSaveArea sub-union target/i386: Adjust AMD XSAVE PKRU area offset in CPUID leaf 0xd target/i386: Manipulate only AMD XSAVE state on AMD target/i386/cpu.c | 19 +++++---- target/i386/cpu.h | 80 ++++++++++++++++++++++++++++-------- target/i386/kvm/kvm.c | 57 +++++++++---------------- target/i386/tcg/fpu_helper.c | 20 ++++++--- target/i386/xsave_helper.c | 70 +++++++++++++++++++------------ 5 files changed, 152 insertions(+), 94 deletions(-)