mbox series

[v2,0/8] KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU

Message ID 20230117013542.371944-1-reijiw@google.com (mailing list archive)
Headers show
Series KVM: arm64: PMU: Allow userspace to limit the number of PMCs on vCPU | expand

Message

Reiji Watanabe Jan. 17, 2023, 1:35 a.m. UTC 
The goal of this series is to allow userspace to limit the number
of PMU event counters on the vCPU. We need this to support migration
across systems that implement different numbers of counters.

The number of PMU event counters is indicated in PMCR_EL0.N.
For a vCPU with PMUv3 configured, its value will be the same as
the host value by default. Userspace can set PMCR_EL0.N for the
vCPU to a lower value than the host value, using KVM_SET_ONE_REG.
However, it is practically unsupported, as KVM resets PMCR_EL0.N
to the host value on vCPU reset and some KVM code uses the host
value to identify (un)implemented event counters on the vCPU.

This series will ensure that the PMCR_EL0.N value is preserved
on vCPU reset and that KVM doesn't use the host value
to identify (un)implemented event counters on the vCPU.
This allows userspace to limit the number of the PMU event
counters on the vCPU.

Patch 1 fixes reset_pmu_reg() to ensure that (RAZ) bits of
{PMCNTEN,PMOVS}{SET,CLR}_EL1 corresponding to unimplemented event
counters on the vCPU are reset to zero even when PMCR_EL0.N for
the vCPU is different from the host.

Patch 2 is a minor refactoring to use the default PMU register reset
function (reset_pmu_reg()) for PMUSERENR_EL0 and PMCCFILTR_EL0.
(With the Patch 1 change, reset_pmu_reg() can now be used for
those registers)

Patch 3 fixes reset_pmcr() to preserve PMCR_EL0.N for the vCPU on
vCPU reset.

Patch 4 adds the sys_reg's set_user() handler for the PMCR_EL0
to disallow userspace to set PMCR_EL0.N for the vCPU to a value
that is greater than the host value.

Patch 5-8 adds a selftest to verify reading and writing PMU registers
for implemented or unimplemented PMU event counters on the vCPU.

The series is based on v6.2-rc4.

v2:
 - Added the sys_reg's set_user() handler for the PMCR_EL0 to
   disallow userspace to set PMCR_EL0.N for the vCPU to a value
   that is greater than the host value (and added a new test
   case for this behavior). [Oliver]
 - Added to the commit log of the patch 2 that PMUSERENR_EL0 and
   PMCCFILTR_EL0 have UNKNOWN reset values.

v1: https://lore.kernel.org/all/20221230035928.3423990-1-reijiw@google.com/

Reiji Watanabe (8):
  KVM: arm64: PMU: Have reset_pmu_reg() to clear a register
  KVM: arm64: PMU: Use reset_pmu_reg() for PMUSERENR_EL0 and
    PMCCFILTR_EL0
  KVM: arm64: PMU: Preserve vCPU's PMCR_EL0.N value on vCPU reset
  KVM: arm64: PMU: Disallow userspace to set PMCR.N greater than the
    host value
  tools: arm64: Import perf_event.h
  KVM: selftests: aarch64: Introduce vpmu_counter_access test
  KVM: selftests: aarch64: vPMU register test for implemented counters
  KVM: selftests: aarch64: vPMU register test for unimplemented counters

 arch/arm64/kvm/pmu-emul.c                     |   6 +
 arch/arm64/kvm/sys_regs.c                     |  57 +-
 tools/arch/arm64/include/asm/perf_event.h     | 258 +++++++
 tools/testing/selftests/kvm/Makefile          |   1 +
 .../kvm/aarch64/vpmu_counter_access.c         | 644 ++++++++++++++++++
 .../selftests/kvm/include/aarch64/processor.h |   1 +
 6 files changed, 954 insertions(+), 13 deletions(-)
 create mode 100644 tools/arch/arm64/include/asm/perf_event.h
 create mode 100644 tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c


base-commit: 5dc4c995db9eb45f6373a956eb1f69460e69e6d4

Comments

Shaoqin Huang Jan. 17, 2023, 7:25 a.m. UTC | #1 
Hi Reiji,


I have tested this patch set on an Ampere machine, and every thing works 
fine.


Tested-by: Shaoqin Huang <shahuang@redhat.com>

On 1/17/23 09:35, Reiji Watanabe wrote:
> The goal of this series is to allow userspace to limit the number
> of PMU event counters on the vCPU. We need this to support migration
> across systems that implement different numbers of counters.
>
> The number of PMU event counters is indicated in PMCR_EL0.N.
> For a vCPU with PMUv3 configured, its value will be the same as
> the host value by default. Userspace can set PMCR_EL0.N for the
> vCPU to a lower value than the host value, using KVM_SET_ONE_REG.
> However, it is practically unsupported, as KVM resets PMCR_EL0.N
> to the host value on vCPU reset and some KVM code uses the host
> value to identify (un)implemented event counters on the vCPU.
>
> This series will ensure that the PMCR_EL0.N value is preserved
> on vCPU reset and that KVM doesn't use the host value
> to identify (un)implemented event counters on the vCPU.
> This allows userspace to limit the number of the PMU event
> counters on the vCPU.
>
> Patch 1 fixes reset_pmu_reg() to ensure that (RAZ) bits of
> {PMCNTEN,PMOVS}{SET,CLR}_EL1 corresponding to unimplemented event
> counters on the vCPU are reset to zero even when PMCR_EL0.N for
> the vCPU is different from the host.
>
> Patch 2 is a minor refactoring to use the default PMU register reset
> function (reset_pmu_reg()) for PMUSERENR_EL0 and PMCCFILTR_EL0.
> (With the Patch 1 change, reset_pmu_reg() can now be used for
> those registers)
>
> Patch 3 fixes reset_pmcr() to preserve PMCR_EL0.N for the vCPU on
> vCPU reset.
>
> Patch 4 adds the sys_reg's set_user() handler for the PMCR_EL0
> to disallow userspace to set PMCR_EL0.N for the vCPU to a value
> that is greater than the host value.
>
> Patch 5-8 adds a selftest to verify reading and writing PMU registers
> for implemented or unimplemented PMU event counters on the vCPU.
>
> The series is based on v6.2-rc4.
>
> v2:
>   - Added the sys_reg's set_user() handler for the PMCR_EL0 to
>     disallow userspace to set PMCR_EL0.N for the vCPU to a value
>     that is greater than the host value (and added a new test
>     case for this behavior). [Oliver]
>   - Added to the commit log of the patch 2 that PMUSERENR_EL0 and
>     PMCCFILTR_EL0 have UNKNOWN reset values.
>
> v1: https://lore.kernel.org/all/20221230035928.3423990-1-reijiw@google.com/
>
> Reiji Watanabe (8):
>    KVM: arm64: PMU: Have reset_pmu_reg() to clear a register
>    KVM: arm64: PMU: Use reset_pmu_reg() for PMUSERENR_EL0 and
>      PMCCFILTR_EL0
>    KVM: arm64: PMU: Preserve vCPU's PMCR_EL0.N value on vCPU reset
>    KVM: arm64: PMU: Disallow userspace to set PMCR.N greater than the
>      host value
>    tools: arm64: Import perf_event.h
>    KVM: selftests: aarch64: Introduce vpmu_counter_access test
>    KVM: selftests: aarch64: vPMU register test for implemented counters
>    KVM: selftests: aarch64: vPMU register test for unimplemented counters
>
>   arch/arm64/kvm/pmu-emul.c                     |   6 +
>   arch/arm64/kvm/sys_regs.c                     |  57 +-
>   tools/arch/arm64/include/asm/perf_event.h     | 258 +++++++
>   tools/testing/selftests/kvm/Makefile          |   1 +
>   .../kvm/aarch64/vpmu_counter_access.c         | 644 ++++++++++++++++++
>   .../selftests/kvm/include/aarch64/processor.h |   1 +
>   6 files changed, 954 insertions(+), 13 deletions(-)
>   create mode 100644 tools/arch/arm64/include/asm/perf_event.h
>   create mode 100644 tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c
>
>
> base-commit: 5dc4c995db9eb45f6373a956eb1f69460e69e6d4
Reiji Watanabe Jan. 18, 2023, 5:53 a.m. UTC | #2 
Hi Shaoqin,

> I have tested this patch set on an Ampere machine, and every thing works
> fine.
>
>
> Tested-by: Shaoqin Huang <shahuang@redhat.com>

Thank you for testing the series!
Reiji


>
> On 1/17/23 09:35, Reiji Watanabe wrote:
> > The goal of this series is to allow userspace to limit the number
> > of PMU event counters on the vCPU. We need this to support migration
> > across systems that implement different numbers of counters.
> >
> > The number of PMU event counters is indicated in PMCR_EL0.N.
> > For a vCPU with PMUv3 configured, its value will be the same as
> > the host value by default. Userspace can set PMCR_EL0.N for the
> > vCPU to a lower value than the host value, using KVM_SET_ONE_REG.
> > However, it is practically unsupported, as KVM resets PMCR_EL0.N
> > to the host value on vCPU reset and some KVM code uses the host
> > value to identify (un)implemented event counters on the vCPU.
> >
> > This series will ensure that the PMCR_EL0.N value is preserved
> > on vCPU reset and that KVM doesn't use the host value
> > to identify (un)implemented event counters on the vCPU.
> > This allows userspace to limit the number of the PMU event
> > counters on the vCPU.
> >
> > Patch 1 fixes reset_pmu_reg() to ensure that (RAZ) bits of
> > {PMCNTEN,PMOVS}{SET,CLR}_EL1 corresponding to unimplemented event
> > counters on the vCPU are reset to zero even when PMCR_EL0.N for
> > the vCPU is different from the host.
> >
> > Patch 2 is a minor refactoring to use the default PMU register reset
> > function (reset_pmu_reg()) for PMUSERENR_EL0 and PMCCFILTR_EL0.
> > (With the Patch 1 change, reset_pmu_reg() can now be used for
> > those registers)
> >
> > Patch 3 fixes reset_pmcr() to preserve PMCR_EL0.N for the vCPU on
> > vCPU reset.
> >
> > Patch 4 adds the sys_reg's set_user() handler for the PMCR_EL0
> > to disallow userspace to set PMCR_EL0.N for the vCPU to a value
> > that is greater than the host value.
> >
> > Patch 5-8 adds a selftest to verify reading and writing PMU registers
> > for implemented or unimplemented PMU event counters on the vCPU.
> >
> > The series is based on v6.2-rc4.
> >
> > v2:
> >   - Added the sys_reg's set_user() handler for the PMCR_EL0 to
> >     disallow userspace to set PMCR_EL0.N for the vCPU to a value
> >     that is greater than the host value (and added a new test
> >     case for this behavior). [Oliver]
> >   - Added to the commit log of the patch 2 that PMUSERENR_EL0 and
> >     PMCCFILTR_EL0 have UNKNOWN reset values.
> >
> > v1: https://lore.kernel.org/all/20221230035928.3423990-1-reijiw@google.com/
> >
> > Reiji Watanabe (8):
> >    KVM: arm64: PMU: Have reset_pmu_reg() to clear a register
> >    KVM: arm64: PMU: Use reset_pmu_reg() for PMUSERENR_EL0 and
> >      PMCCFILTR_EL0
> >    KVM: arm64: PMU: Preserve vCPU's PMCR_EL0.N value on vCPU reset
> >    KVM: arm64: PMU: Disallow userspace to set PMCR.N greater than the
> >      host value
> >    tools: arm64: Import perf_event.h
> >    KVM: selftests: aarch64: Introduce vpmu_counter_access test
> >    KVM: selftests: aarch64: vPMU register test for implemented counters
> >    KVM: selftests: aarch64: vPMU register test for unimplemented counters
> >
> >   arch/arm64/kvm/pmu-emul.c                     |   6 +
> >   arch/arm64/kvm/sys_regs.c                     |  57 +-
> >   tools/arch/arm64/include/asm/perf_event.h     | 258 +++++++
> >   tools/testing/selftests/kvm/Makefile          |   1 +
> >   .../kvm/aarch64/vpmu_counter_access.c         | 644 ++++++++++++++++++
> >   .../selftests/kvm/include/aarch64/processor.h |   1 +
> >   6 files changed, 954 insertions(+), 13 deletions(-)
> >   create mode 100644 tools/arch/arm64/include/asm/perf_event.h
> >   create mode 100644 tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c
> >
> >
> > base-commit: 5dc4c995db9eb45f6373a956eb1f69460e69e6d4
>
> --
> Regards,
> Shaoqin
>