[0/2] KVM: x86: Fix a WARN in kvm_apic_send_ipi()

Message

Tao Su Sept. 4, 2023, 1:35 a.m. UTC

When IPI virtualization is enabled, a WARN is triggered if bit12 of ICR
MSR is set after APIC-write VM-exit. The reason is kvm_apic_send_ipi()
thinks the APIC_ICR_BUSY bit should be cleared because KVM has no delay,
but kvm_apic_write_nodecode() doesn't clear the APIC_ICR_BUSY bit.

The APIC_ICR_BUSY bit is removed in x2APIC mode, and bit12 of ICR is
changed to UNUSED bit, but kvm_x2apic_icr_write() still uses
APIC_ICR_BUSY, which may cause ambiguity, so introducing
X2APIC_ICR_UNUSED_12 instead.

When X2APIC_ICR_UNUSED_12 is set, how the hardware handles it
determines how the WARN is fixed. However SDM has no detail about it,
we tested on Intel CPU (SRF/GNR) with IPI virtualization and found
X2APIC_ICR_UNUSED_12 was also cleared by hardware without #GP. Therefore,
the clearing of bit12 should be still kept being consistent with the
hardware behavior.

Tao Su (2):
  x86/apic: Introduce X2APIC_ICR_UNUSED_12 for x2APIC mode
  KVM: x86: Clear X2APIC_ICR_UNUSED_12 after APIC-write VM-exit

 arch/x86/include/asm/apicdef.h |  1 +
 arch/x86/kvm/lapic.c           | 27 ++++++++++++++++++++-------
 2 files changed, 21 insertions(+), 7 deletions(-)


base-commit: 708283abf896dd4853e673cc8cba70acaf9bf4ea