From patchwork Fri Dec 29 21:49:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Kumar Patra X-Patchwork-Id: 13506663 Received: from mail-oo1-f53.google.com (mail-oo1-f53.google.com [209.85.161.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 73DDD14A85 for ; Fri, 29 Dec 2023 21:50:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="U7gLqHhi" Received: by mail-oo1-f53.google.com with SMTP id 006d021491bc7-58dd3528497so4324560eaf.3 for ; Fri, 29 Dec 2023 13:50:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1703886599; x=1704491399; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=vu5q4X23PA3gtec4TspOf+EMnf830wRQIwKELSXAAlg=; b=U7gLqHhiuIQYWeGy8p/wVg6RFUiZGuHY2zDoN/Zxrp+EMu2SYYls1SJoVSODfIJCE9 DC4fOfeykJZacOxXaEZ6WWXRCS7e8JuExy/za/ar+u5CosiVS/n6Z0qvAD2wduyTbCXA ho8LIPeOggRA+OJDkJOc3R0sNNWf7YLIjON6ajjPI0SFaxRzNiUcgjCegbmxPmWwz+FB a4nsPlQFp2nSA6fvg1LGNp/wAQtUelmBW208l8AMcxWd1XGan/Ac1i8y0FtPW5aytdPm X40tqOPLuFYi3pNh2mqBqIQRY6aa942fUkJYF2ttK/7Ea4QH0jua09SXhqUgvxvDbY5d AZGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703886599; x=1704491399; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=vu5q4X23PA3gtec4TspOf+EMnf830wRQIwKELSXAAlg=; b=qnxLhWlgB27+JDJrt8qsF0MC+sp75evInzwPtqBigWnKjVphUA48IPMCEnz9Z4sfO8 192nhFRfMobS8ROlRf6rSLQsfUpDlVEZOfIxneerIVOBCOYOKa4qRgeruvK/Zd4VoQ02 Pa3ID4AM6GoBposraP5tAMMyY27kBbC/Lh3KbMHb1LZ3jKMnD5TSXh167bS12IsRh5zy R+nOAj4dILaHbGcrIrXU7dhV5sqjX8W9h0vGD5p1MWTBacXd5m3TgrNRG+6Vfc4WJqgH PxnhG7RoZ4aiBva4NKgoZo+4y02LtNNTRU01BACM3nxljmjR6hpahDQO2uFFZlIMBQjp K5AQ== X-Gm-Message-State: AOJu0Yxp72x6BU5ANBiWiEAbYC3n/zLKPwLCVk14odWWRBllvB1lCLvN BOtbAAOB24Y/EQMEQGrKvIuFa/nWGxgoWA== X-Google-Smtp-Source: AGHT+IE4adQTrYfGl0DW+ARqwiPxecQVrJ4ALqtPDiAPRb/B3Ew7k6CVBZfqktu9JrRBtv0ixr8PrA== X-Received: by 2002:a4a:5b07:0:b0:595:3fd1:295b with SMTP id g7-20020a4a5b07000000b005953fd1295bmr263275oob.7.1703886599285; Fri, 29 Dec 2023 13:49:59 -0800 (PST) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id r126-20020a4a4e84000000b00594e32e4364sm1034751ooa.24.2023.12.29.13.49.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Dec 2023 13:49:58 -0800 (PST) From: Atish Patra To: linux-kernel@vger.kernel.org Cc: Atish Patra , Albert Ou , Alexandre Ghiti , Andrew Jones , Anup Patel , Atish Patra , Conor Dooley , Guo Ren , Heiko Stuebner , kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland , Palmer Dabbelt , Paul Walmsley , Will Deacon Subject: [v2 00/10] RISC-V SBI v2.0 PMU improvements and Perf sampling in KVM guest Date: Fri, 29 Dec 2023 13:49:40 -0800 Message-Id: <20231229214950.4061381-1-atishp@rivosinc.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This series implements SBI PMU improvements done in SBI v2.0[1] i.e. PMU snapshot and fw_read_hi() functions. SBI v2.0 introduced PMU snapshot feature which allows the SBI implementation to provide counter information (i.e. values/overflow status) via a shared memory between the SBI implementation and supervisor OS. This allows to minimize the number of traps in when perf being used inside a kvm guest as it relies on SBI PMU + trap/emulation of the counters. The current set of ratified RISC-V specification also doesn't allow scountovf to be trap/emulated by the hypervisor. The SBI PMU snapshot bridges the gap in ISA as well and enables perf sampling in the guest. However, LCOFI in the guest only works via IRQ filtering in AIA specification. That's why, AIA has to be enabled in the hardware (at least the Ssaia extension) in order to use the sampling support in the perf. Here are the patch wise implementation details. PATCH 1,6,7 : Generic cleanups/improvements. PATCH 2,3,10 : FW_READ_HI function implementation PATCH 4-5: Add PMU snapshot feature in sbi pmu driver PATCH 6-7: KVM implementation for snapshot and sampling in kvm guests The series is based on kvm-next and is available at: https://github.com/atishp04/linux/tree/kvm_pmu_snapshot_v2 The kvmtool patch is also available at: https://github.com/atishp04/kvmtool/tree/sscofpmf It also requires Ssaia ISA extension to be present in the hardware in order to get perf sampling support in the guest. In Qemu virt machine, it can be done by the following config. ``` -cpu rv64,sscofpmf=true,x-ssaia=true ``` There is no other dependencies on AIA apart from that. Thus, Ssaia must be disabled for the guest if AIA patches are not available. Here is the example command. ``` ./lkvm-static run -m 256 -c2 --console serial -p "console=ttyS0 earlycon" --disable-ssaia -k ./Image --debug ``` The series has been tested only in Qemu. Here is the snippet of the perf running inside a kvm guest. =================================================== $ perf record -e cycles -e instructions perf bench sched messaging -g 5 ... $ Running 'sched/messaging' benchmark: ... [ 45.928723] perf_duration_warn: 2 callbacks suppressed [ 45.929000] perf: interrupt took too long (484426 > 483186), lowering kernel.perf_event_max_sample_rate to 250 $ 20 sender and receiver processes per group $ 5 groups == 200 processes run Total time: 14.220 [sec] [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.117 MB perf.data (1942 samples) ] $ perf report --stdio $ To display the perf.data header info, please use --header/--header-only optio> $ $ $ Total Lost Samples: 0 $ $ Samples: 943 of event 'cycles' $ Event count (approx.): 5128976844 $ $ Overhead Command Shared Object Symbol > $ ........ ............... ........................... .....................> $ 7.59% sched-messaging [kernel.kallsyms] [k] memcpy 5.48% sched-messaging [kernel.kallsyms] [k] percpu_counter_ad> 5.24% sched-messaging [kernel.kallsyms] [k] __sbi_rfence_v02_> 4.00% sched-messaging [kernel.kallsyms] [k] _raw_spin_unlock_> 3.79% sched-messaging [kernel.kallsyms] [k] set_pte_range 3.72% sched-messaging [kernel.kallsyms] [k] next_uptodate_fol> 3.46% sched-messaging [kernel.kallsyms] [k] filemap_map_pages 3.31% sched-messaging [kernel.kallsyms] [k] handle_mm_fault 3.20% sched-messaging [kernel.kallsyms] [k] finish_task_switc> 3.16% sched-messaging [kernel.kallsyms] [k] clear_page 3.03% sched-messaging [kernel.kallsyms] [k] mtree_range_walk 2.42% sched-messaging [kernel.kallsyms] [k] flush_icache_pte =================================================== [1] https://github.com/riscv-non-isa/riscv-sbi-doc Changes from v1->v2: 1. Fixed warning/errors from patchwork CI. 2. Rebased on top of kvm-next. 3. Added Acked-by tags. Changes from RFC->v1: 1. Addressed all the comments on RFC series. 2. Removed PATCH2 and merged into later patches. 3. Added 2 more patches for minor fixes. 4. Fixed KVM boot issue without Ssaia and made sscofpmf in guest dependent on Ssaia in the host. Atish Patra (10): RISC-V: Fix the typo in Scountovf CSR name RISC-V: Add FIRMWARE_READ_HI definition drivers/perf: riscv: Read upper bits of a firmware counter RISC-V: Add SBI PMU snapshot definitions drivers/perf: riscv: Implement SBI PMU snapshot function RISC-V: KVM: No need to update the counter value during reset RISC-V: KVM: No need to exit to the user space if perf event failed RISC-V: KVM: Implement SBI PMU Snapshot feature RISC-V: KVM: Add perf sampling support for guests RISC-V: KVM: Support 64 bit firmware counters on RV32 arch/riscv/include/asm/csr.h | 5 +- arch/riscv/include/asm/errata_list.h | 2 +- arch/riscv/include/asm/kvm_vcpu_pmu.h | 14 +- arch/riscv/include/asm/sbi.h | 12 ++ arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kvm/aia.c | 5 + arch/riscv/kvm/main.c | 1 + arch/riscv/kvm/vcpu.c | 8 +- arch/riscv/kvm/vcpu_onereg.c | 9 +- arch/riscv/kvm/vcpu_pmu.c | 246 ++++++++++++++++++++++++-- arch/riscv/kvm/vcpu_sbi_pmu.c | 15 +- drivers/perf/riscv_pmu.c | 1 + drivers/perf/riscv_pmu_sbi.c | 228 ++++++++++++++++++++++-- include/linux/perf/riscv_pmu.h | 6 + 14 files changed, 508 insertions(+), 45 deletions(-) --- 2.34.1