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Wed, 5 Jun 2024 16:01:21 +0000 (GMT) From: Gerd Bayer To: Alex Williamson , Jason Gunthorpe , Niklas Schnelle , Ramesh Thomas Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org, Ankit Agrawal , Yishai Hadas , Halil Pasic , Ben Segal , "Tian, Kevin" , Julian Ruess , Gerd Bayer Subject: [PATCH v5 0/3] vfio/pci: Support 8-byte PCI loads and stores Date: Wed, 5 Jun 2024 18:01:09 +0200 Message-ID: <20240605160112.925957-1-gbayer@linux.ibm.com> X-Mailer: git-send-email 2.45.1 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Q4tcIlc74_wKgOIqwbH6K9mEc5wXicDv X-Proofpoint-ORIG-GUID: bHIjQIr2MfMR0yWuKQF54ceD7T97rTEO X-Proofpoint-UnRewURL: 0 URL was un-rewritten Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-05_02,2024-06-05_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 mlxlogscore=999 spamscore=0 mlxscore=0 bulkscore=0 adultscore=0 suspectscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406050121 Hi all, this all started with a single patch by Ben to enable writing a user-mode driver for a PCI device that requires 64bit register read/writes on s390. A quick grep showed that there are several other drivers for PCI devices in the kernel that use readq/writeq and eventually could use this, too. So we decided to propose this for general inclusion. A couple of suggestions for refactorizations by Jason Gunthorpe and Alex Williamson later [1], I arrived at this little series that avoids some code duplication in vfio_pci_core_do_io_rw(). Also, I've added a small patch to correct the spelling in one of the declaration macros that was suggested by Ramesh Thomas [2]. However, after some discussions about making 8-byte accesses available for x86, Ramesh and I decided to do this in a separate patch [3]. This version was tested with a pass-through PCI device in a KVM guest and with explicit test reads of size 8, 16, 32, and 64 bit on s390. For 32bit architectures this has only been compile tested for the 32bit ARM architecture. Thank you, Gerd Bayer [1] https://lore.kernel.org/all/20240422153508.2355844-1-gbayer@linux.ibm.com/ [2] https://lore.kernel.org/kvm/20240425165604.899447-1-gbayer@linux.ibm.com/T/#m1b51fe155c60d04313695fbee11a2ccea856a98c [3] https://lore.kernel.org/all/20240522232125.548643-1-ramesh.thomas@intel.com/ Changes v4 -> v5: - Make 8-byte accessors depend on the definitions of ioread64 and iowrite64, again. Ramesh agreed to sort these out for x86 separately. Changes v3 -> v4: - Make 64-bit accessors depend on CONFIG_64BIT (for x86, too). - Drop conversion of if-else if chain to switch-case. - Add patch to fix spelling of declaration macro. Changes v2 -> v3: - Introduce macro to generate body of different-size accesses in vfio_pci_core_do_io_rw (courtesy Alex Williamson). - Convert if-else if chain to a switch-case construct to better accommodate conditional compiles. Changes v1 -> v2: - On non 64bit architecture use at most 32bit accesses in vfio_pci_core_do_io_rw and describe that in the commit message. - Drop the run-time error on 32bit architectures. - The #endif splitting the "else if" is not really fortunate, but I'm open to suggestions. Ben Segal (1): vfio/pci: Support 8-byte PCI loads and stores Gerd Bayer (2): vfio/pci: Extract duplicated code into macro vfio/pci: Fix typo in macro to declare accessors drivers/vfio/pci/vfio_pci_rdwr.c | 122 ++++++++++++++++--------------- include/linux/vfio_pci_core.h | 25 ++++--- 2 files changed, 76 insertions(+), 71 deletions(-)