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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Aug 2024 05:38:06.6786 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f6746b71-ac1b-40cd-3916-08dcc7ecc276 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4293 TSC value calculations for the guest are controlled by the hypervisor. A malicious hypervisor can prevent guest from moving forward. The Secure TSC feature for SEV-SNP allows guests to securely use the RDTSC and RDTSCP instructions. This ensures the guest gets a consistent view of time and prevents a malicious hypervisor from making it appear that time rolls backwards, advancing at an unusually fast rate, or employing similar tricks. For more details, please refer to "Secure Nested Paging (SEV-SNP)" section, subsection "Secure TSC" of APM Volume 2 This patchset is also available at: https://github.com/AMDESE/linux-kvm/tree/sectsc-host-latest and is based on v6.11-rc5 Testing SecureTSC ----------------- SecureTSC Guest patches: https://github.com/AMDESE/linux-kvm/tree/sectsc-guest-latest QEMU changes: https://github.com/nikunjad/qemu/tree/snp-securetsc-latest QEMU commandline SEV-SNP with SecureTSC: qemu-system-x86_64 -cpu EPYC-Milan-v2 -smp 4 \ -object memory-backend-memfd,id=ram1,size=1G,share=true,prealloc=false,reserve=false \ -object sev-snp-guest,id=sev0,cbitpos=51,reduced-phys-bits=1,secure-tsc=on \ -machine q35,confidential-guest-support=sev0,memory-backend=ram1 \ ... Ketan Chaturvedi (2): KVM: SVM: Set TSC frequency for SecureTSC-enabled guests KVM: SVM: Add Secure TSC support for SNP Guest Nikunj A Dadhania (3): x86/cpufeatures: Add SNP Secure TSC KVM: SVM: Add GUEST_TSC_FREQ MSR KVM: SVM: Prevent writes to TSC MSR when Secure TSC is enabled arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/msr-index.h | 1 + arch/x86/include/asm/svm.h | 1 + arch/x86/include/uapi/asm/kvm.h | 3 ++- arch/x86/kvm/svm/sev.c | 15 +++++++++++++++ arch/x86/kvm/svm/svm.c | 12 ++++++++++++ arch/x86/kvm/svm/svm.h | 14 +++++++++++++- include/linux/psp-sev.h | 2 ++ 8 files changed, 47 insertions(+), 2 deletions(-) base-commit: 5be63fc19fcaa4c236b307420483578a56986a37