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Fri, 14 Feb 2025 17:30:20 -0800 (PST) Reply-To: Sean Christopherson Date: Fri, 14 Feb 2025 17:30:12 -0800 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 X-Mailer: git-send-email 2.48.1.601.g30ceb7b040-goog Message-ID: <20250215013018.1210432-1-seanjc@google.com> Subject: [kvm-unit-tests PATCH v2 0/6] x86: LA57 canonical testcases From: Sean Christopherson To: Paolo Bonzini Cc: kvm@vger.kernel.org, Maxim Levitsky , Sean Christopherson v2 of Maxim's series to add testcases for canonical checks of various MSRs, segment bases, and instructions that were found to ignore CR4.LA57 on CPUs that support 5 level paging. v2: - Fold into existing la57 test. - Always skip SYSENTER tests (they fail when run in a VM). - Lots of cosmetics cleanups (see v1 feedback for details). v1: https://lore.kernel.org/all/20240907005440.500075-1-mlevitsk@redhat.com Maxim Levitsky (5): x86: Add _safe() and _fep_safe() variants to segment base load instructions x86: Add a few functions for gdt manipulation x86: Move struct invpcid_desc descriptor to processor.h x86: Add testcases for writing (non)canonical LA57 values to MSRs and bases nVMX: add a test for canonical checks of various host state vmcs12 fields. Sean Christopherson (1): x86: Expand LA57 test to 64-bit mode (to prep for canonical testing) lib/x86/desc.c | 38 ++++- lib/x86/desc.h | 9 +- lib/x86/msr.h | 42 ++++++ lib/x86/processor.h | 58 +++++++- x86/Makefile.common | 3 +- x86/Makefile.i386 | 2 +- x86/la57.c | 342 +++++++++++++++++++++++++++++++++++++++++++- x86/pcid.c | 6 - x86/unittests.cfg | 2 +- x86/vmx_tests.c | 167 +++++++++++++++++++++ 10 files changed, 645 insertions(+), 24 deletions(-) base-commit: f77fb696cfd0e4a5562cdca189be557946bf522f