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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jun 2024 19:12:27.5229 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6afec269-a446-4da6-6bb1-08dc8b1399bb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002315.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7453 This series adds the support for following features in qemu. 1. RAS feature bits (SUCCOR, McaOverflowRecov) 2. perfmon-v2 3. Update EPYC-Genoa to support perfmon-v2 and RAS bits 4. Add support for EPYC-Turin Babu Moger (3): i386/cpu: Add RAS feature bits on EPYC CPU models i386/cpu: Enable perfmon-v2 and RAS feature bits on EPYC-Genoa i386/cpu: Add support for EPYC-Turin model Sandipan Das (1): i386/cpu: Add PerfMonV2 feature bit target/i386/cpu.c | 202 ++++++++++++++++++++++++++++++++++++++++++++++ target/i386/cpu.h | 4 + 2 files changed, 206 insertions(+)