Show patches with: Submitter = Nadav Har'El       |    State = Action Required       |   214 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[06/30] nVMX: Decoding memory operands of VMX instructions - - - --- 2011-05-08 Nadav Har'El New
[05/30] nVMX: Implement reading and writing of VMX MSRs - - - --- 2011-05-08 Nadav Har'El New
[04/30] nVMX: Introduce vmcs12: a VMCS structure for L1 - - - --- 2011-05-08 Nadav Har'El New
[03/30] nVMX: Allow setting the VMXE bit in CR4 - - - --- 2011-05-08 Nadav Har'El New
[02/30] nVMX: Implement VMXON and VMXOFF - - - --- 2011-05-08 Nadav Har'El New
[01/30] nVMX: Add "nested" module option to kvm_intel - - - --- 2011-05-08 Nadav Har'El New
[29/29] nVMX: Documentation - - - --- 2011-01-27 Nadav Har'El New
[28/29] nVMX: Miscellenous small corrections - - - --- 2011-01-27 Nadav Har'El New
[27/29] nVMX: Add VMX to list of supported cpuid features - - - --- 2011-01-27 Nadav Har'El New
[26/29] nVMX: Additional TSC-offset handling - - - --- 2011-01-27 Nadav Har'El New
[25/29] nVMX: Further fixes for lazy FPU loading - - - --- 2011-01-27 Nadav Har'El New
[24/29] nVMX: Handling of CR0 and CR4 modifying instructions - - - --- 2011-01-27 Nadav Har'El New
[23/29] nVMX: Correct handling of idt vectoring info - - - --- 2011-01-27 Nadav Har'El New
[22/29] nVMX: Correct handling of exception injection - - - --- 2011-01-27 Nadav Har'El New
[21/29] nVMX: Correct handling of interrupt injection - - - --- 2011-01-27 Nadav Har'El New
[20/29] nVMX: Deciding if L0 or L1 should handle an L2 exit - - - --- 2011-01-27 Nadav Har'El New
[19/29] nVMX: Exiting from L2 to L1 - - - --- 2011-01-27 Nadav Har'El New
[18/29] nVMX: No need for handle_vmx_insn function any more - - - --- 2011-01-27 Nadav Har'El New
[17/29] nVMX: Implement VMLAUNCH and VMRESUME - - - --- 2011-01-27 Nadav Har'El New
[16/29] nVMX: Move register-syncing to a function - - - --- 2011-01-27 Nadav Har'El New
[15/29] nVMX: Prepare vmcs02 from vmcs01 and vmcs12 - - - --- 2011-01-27 Nadav Har'El New
[14/29] nVMX: Implement VMREAD and VMWRITE - - - --- 2011-01-27 Nadav Har'El New
[13/29] nVMX: Implement VMPTRST - - - --- 2011-01-27 Nadav Har'El New
[12/29] nVMX: Implement VMPTRLD - - - --- 2011-01-27 Nadav Har'El New
[11/29] nVMX: Implement VMCLEAR - - - --- 2011-01-27 Nadav Har'El New
[10/29] nVMX: Success/failure of VMX instructions. - - - --- 2011-01-27 Nadav Har'El New
[09/29] nVMX: Add VMCS fields to the vmcs12 - - - --- 2011-01-27 Nadav Har'El New
[08/29] nVMX: Fix local_vcpus_link handling - - - --- 2011-01-27 Nadav Har'El New
[07/29] nVMX: Hold a vmcs02 for each vmcs12 - - - --- 2011-01-27 Nadav Har'El New
[06/29] nVMX: Decoding memory operands of VMX instructions - - - --- 2011-01-27 Nadav Har'El New
[05/29] nVMX: Implement reading and writing of VMX MSRs - - - --- 2011-01-27 Nadav Har'El New
[04/29] nVMX: Introduce vmcs12: a VMCS structure for L1 - - - --- 2011-01-27 Nadav Har'El New
[03/29] nVMX: Allow setting the VMXE bit in CR4 - - - --- 2011-01-27 Nadav Har'El New
[02/29] nVMX: Implement VMXON and VMXOFF - - - --- 2011-01-27 Nadav Har'El New
[01/29] nVMX: Add "nested" module option to vmx.c - - - --- 2011-01-27 Nadav Har'El New
[28/28] nVMX: Documentation - - - --- 2010-12-08 Nadav Har'El New
[27/28] nVMX: Miscellenous small corrections - - - --- 2010-12-08 Nadav Har'El New
[26/28] nVMX: Additional TSC-offset handling - - - --- 2010-12-08 Nadav Har'El New
[25/28] nVMX: Further fixes for lazy FPU loading - - - --- 2010-12-08 Nadav Har'El New
[24/28] nVMX: Handling of CR0 and CR4 modifying instructions - - - --- 2010-12-08 Nadav Har'El New
[23/28] nVMX: Correct handling of idt vectoring info - - - --- 2010-12-08 Nadav Har'El New
[22/28] nVMX: Correct handling of exception injection - - - --- 2010-12-08 Nadav Har'El New
[21/28] nVMX: Correct handling of interrupt injection - - - --- 2010-12-08 Nadav Har'El New
[20/28] nVMX: Deciding if L0 or L1 should handle an L2 exit - - - --- 2010-12-08 Nadav Har'El New
[19/28] nVMX: Exiting from L2 to L1 - - - --- 2010-12-08 Nadav Har'El New
[18/28] nVMX: No need for handle_vmx_insn function any more - - - --- 2010-12-08 Nadav Har'El New
[17/28] nVMX: Implement VMLAUNCH and VMRESUME - - - --- 2010-12-08 Nadav Har'El New
[16/28] nVMX: Move register-syncing to a function - - - --- 2010-12-08 Nadav Har'El New
[15/28] nVMX: Prepare vmcs02 from vmcs01 and vmcs12 - - - --- 2010-12-08 Nadav Har'El New
[14/28] nVMX: Implement VMREAD and VMWRITE - - - --- 2010-12-08 Nadav Har'El New
[13/28] nVMX: Implement VMPTRST - - - --- 2010-12-08 Nadav Har'El New
[12/28] nVMX: Implement VMPTRLD - - - --- 2010-12-08 Nadav Har'El New
[11/28] nVMX: Implement VMCLEAR - - - --- 2010-12-08 Nadav Har'El New
[10/28] nVMX: Success/failure of VMX instructions. - - - --- 2010-12-08 Nadav Har'El New
[09/28] nVMX: Add VMCS fields to the vmcs12 - - - --- 2010-12-08 Nadav Har'El New
[08/28] nVMX: Hold a vmcs02 for each vmcs12 - - - --- 2010-12-08 Nadav Har'El New
[07/28] nVMX: Decoding memory operands of VMX instructions - - - --- 2010-12-08 Nadav Har'El New
[06/28] nVMX: Implement reading and writing of VMX MSRs - - - --- 2010-12-08 Nadav Har'El New
[05/28] nVMX: Introduce vmcs12: a VMCS structure for L1 - - - --- 2010-12-08 Nadav Har'El New
[04/28] nVMX: Allow setting the VMXE bit in CR4 - - - --- 2010-12-08 Nadav Har'El New
[03/28] nVMX: Implement VMXON and VMXOFF - - - --- 2010-12-08 Nadav Har'El New
[02/28] nVMX: Add VMX and SVM to list of supported cpuid features - - - --- 2010-12-08 Nadav Har'El New
[01/28] nVMX: Add "nested" module option to vmx.c - - - --- 2010-12-08 Nadav Har'El New
[27/27] nVMX: Documentation - - - --- 2010-10-17 Nadav Har'El New
[26/27] nVMX: Miscellenous small corrections - - - --- 2010-10-17 Nadav Har'El New
[25/27] nVMX: Additional TSC-offset handling - - - --- 2010-10-17 Nadav Har'El New
[24/27] nVMX: Handling of CR0.TS and #NM for Lazy FPU loading - - - --- 2010-10-17 Nadav Har'El New
[23/27] nVMX: Correct handling of idt vectoring info - - - --- 2010-10-17 Nadav Har'El New
[22/27] nVMX: Correct handling of exception injection - - - --- 2010-10-17 Nadav Har'El New
[21/27] nVMX: Correct handling of interrupt injection - - - --- 2010-10-17 Nadav Har'El New
[20/27] nVMX: Deciding if L0 or L1 should handle an L2 exit - - - --- 2010-10-17 Nadav Har'El New
[19/27] nVMX: Exiting from L2 to L1 - - - --- 2010-10-17 Nadav Har'El New
[18/27] nVMX: No need for handle_vmx_insn function any more - - - --- 2010-10-17 Nadav Har'El New
[17/27] nVMX: Implement VMLAUNCH and VMRESUME - - - --- 2010-10-17 Nadav Har'El New
[16/27] nVMX: Move register-syncing to a function - - - --- 2010-10-17 Nadav Har'El New
[15/27] nVMX: Prepare vmcs02 from vmcs01 and vmcs12 - - - --- 2010-10-17 Nadav Har'El New
[14/27] nVMX: Implement VMREAD and VMWRITE - - - --- 2010-10-17 Nadav Har'El New
[13/27] nVMX: Add VMCS fields to the vmcs12 - - - --- 2010-10-17 Nadav Har'El New
[12/27] nVMX: Implement VMPTRST - - - --- 2010-10-17 Nadav Har'El New
[11/27] nVMX: Implement VMPTRLD - - - --- 2010-10-17 Nadav Har'El New
[10/27] nVMX: Implement VMCLEAR - - - --- 2010-10-17 Nadav Har'El New
[09/27] nVMX: Success/failure of VMX instructions. - - - --- 2010-10-17 Nadav Har'El New
[08/27] nVMX: Hold a vmcs02 for each vmcs12 - - - --- 2010-10-17 Nadav Har'El New
[07/27] nVMX: Decoding memory operands of VMX instructions - - - --- 2010-10-17 Nadav Har'El New
[06/27] nVMX: Implement reading and writing of VMX MSRs - - - --- 2010-10-17 Nadav Har'El New
[05/27] nVMX: Introduce vmcs12: a VMCS structure for L1 - - - --- 2010-10-17 Nadav Har'El New
[04/27] nVMX: Allow setting the VMXE bit in CR4 - - - --- 2010-10-17 Nadav Har'El New
[03/27] nVMX: Implement VMXON and VMXOFF - - - --- 2010-10-17 Nadav Har'El New
[02/27] nVMX: Add VMX and SVM to list of supported cpuid features - - - --- 2010-10-17 Nadav Har'El New
[01/27] nVMX: Add "nested" module option to vmx.c - - - --- 2010-10-17 Nadav Har'El New
[24/24] Miscellenous small corrections - - - --- 2010-06-13 Nadav Har'El New
[23/24] Handling of CR0.TS and #NM for Lazy FPU loading - - - --- 2010-06-13 Nadav Har'El New
[22/24] Correct handling of idt vectoring info - - - --- 2010-06-13 Nadav Har'El New
[21/24] Correct handling of exception injection - - - --- 2010-06-13 Nadav Har'El New
[20/24] Correct handling of interrupt injection - - - --- 2010-06-13 Nadav Har'El New
[19/24] Deciding if L0 or L1 should handle an L2 exit - - - --- 2010-06-13 Nadav Har'El New
[18/24] Exiting from L2 to L1 - - - --- 2010-06-13 Nadav Har'El New
[17/24] No need for handle_vmx_insn function any more - - - --- 2010-06-13 Nadav Har'El New
[16/24] Implement VMLAUNCH and VMRESUME - - - --- 2010-06-13 Nadav Har'El New
[15/24] Move register-syncing to a function - - - --- 2010-06-13 Nadav Har'El New
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