From patchwork Wed Mar 25 10:27:45 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Yang" X-Patchwork-Id: 14295 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n2PAVPVn005399 for ; Wed, 25 Mar 2009 10:31:25 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753449AbZCYKbX (ORCPT ); Wed, 25 Mar 2009 06:31:23 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1752693AbZCYKbX (ORCPT ); Wed, 25 Mar 2009 06:31:23 -0400 Received: from mga11.intel.com ([192.55.52.93]:61674 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752099AbZCYKbV (ORCPT ); Wed, 25 Mar 2009 06:31:21 -0400 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 25 Mar 2009 03:27:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.38,418,1233561600"; d="scan'208,223";a="441870574" Received: from pgsmsx602.gar.corp.intel.com ([10.221.43.81]) by fmsmga002.fm.intel.com with ESMTP; 25 Mar 2009 03:26:39 -0700 Received: from pgsmsx601.gar.corp.intel.com (10.221.43.69) by pgsmsx602.gar.corp.intel.com (10.221.43.81) with Microsoft SMTP Server (TLS) id 8.1.340.0; Wed, 25 Mar 2009 18:29:24 +0800 Received: from pdsmsx601.ccr.corp.intel.com (172.16.12.94) by pgsmsx601.gar.corp.intel.com (10.221.43.69) with Microsoft SMTP Server (TLS) id 8.1.340.0; Wed, 25 Mar 2009 18:29:23 +0800 Received: from pdsmsx502.ccr.corp.intel.com ([172.16.12.96]) by pdsmsx601.ccr.corp.intel.com ([172.16.12.94]) with mapi; Wed, 25 Mar 2009 18:29:23 +0800 From: "Zhang, Yang" To: "kvm-ia64@vger.kernel.org" CC: "kvm@vger.kernel.org" , Avi Kivity , "Zhang, Xiantao" Date: Wed, 25 Mar 2009 18:27:45 +0800 Subject: [PATCH] KVM: IA64: enable external interrupt in vmm Thread-Topic: [PATCH] KVM: IA64: enable external interrupt in vmm Thread-Index: AcmtNFZ8E69nM0FsRXqKG4ogZBVyNA== Message-ID: <10C63FAD690C13458F0B32BCED571F140E29AF79@pdsmsx502.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From 2cf75eff171ef823b3b17c945504d0233a6bd427 Mon Sep 17 00:00:00 2001 From: Yang Zhang Date: Mon, 23 Mar 2009 03:31:04 -0400 Subject: [PATCH] KVM: IA64: enable external interrupt in vmm In the previous version, the interrupt bit is cleared when in the vmm. This patch opens the bit and the externanl interrupt can be deal with when in the vmm. It will improve the I/O performance. Signed-off-by: Yang Zhang --- arch/ia64/kvm/process.c | 5 +++++ arch/ia64/kvm/vmm_ivt.S | 18 +++++++++--------- arch/ia64/kvm/vtlb.c | 3 +++ 3 files changed, 17 insertions(+), 9 deletions(-) diff --git a/arch/ia64/kvm/process.c b/arch/ia64/kvm/process.c index b1dc809..a8f84da 100644 --- a/arch/ia64/kvm/process.c +++ b/arch/ia64/kvm/process.c @@ -652,20 +652,25 @@ void kvm_ia64_handle_break(unsigned long ifa, struct kvm_pt_regs *regs, unsigned long isr, unsigned long iim) { struct kvm_vcpu *v = current_vcpu; + long psr; if (ia64_psr(regs)->cpl == 0) { /* Allow hypercalls only when cpl = 0. */ if (iim == DOMN_PAL_REQUEST) { + local_irq_save(psr); set_pal_call_data(v); vmm_transition(v); get_pal_call_result(v); vcpu_increment_iip(v); + local_irq_restore(psr); return; } else if (iim == DOMN_SAL_REQUEST) { + local_irq_save(psr); set_sal_call_data(v); vmm_transition(v); get_sal_call_result(v); vcpu_increment_iip(v); + local_irq_restore(psr); return; } } diff --git a/arch/ia64/kvm/vmm_ivt.S b/arch/ia64/kvm/vmm_ivt.S index 3ef1a01..40920c6 100644 --- a/arch/ia64/kvm/vmm_ivt.S +++ b/arch/ia64/kvm/vmm_ivt.S @@ -95,7 +95,7 @@ GLOBAL_ENTRY(kvm_vmm_panic) ;; srlz.i // guarantee that interruption collection is on ;; - //(p15) ssm psr.i // restore psr.i + (p15) ssm psr.i // restore psr. addl r14=@gprel(ia64_leave_hypervisor),gp ;; KVM_SAVE_REST @@ -249,7 +249,7 @@ ENTRY(kvm_break_fault) ;; srlz.i // guarantee that interruption collection is on ;; - //(p15)ssm psr.i // restore psr.i + (p15)ssm psr.i // restore psr.i addl r14=@gprel(ia64_leave_hypervisor),gp ;; KVM_SAVE_REST @@ -439,7 +439,7 @@ kvm_dispatch_vexirq: ;; srlz.i // guarantee that interruption collection is on ;; - //(p15) ssm psr.i // restore psr.i + (p15) ssm psr.i // restore psr.i adds r3=8,r2 // set up second base pointer ;; KVM_SAVE_REST @@ -819,7 +819,7 @@ ENTRY(kvm_dtlb_miss_dispatch) ;; srlz.i // guarantee that interruption collection is on ;; - //(p15) ssm psr.i // restore psr.i + (p15) ssm psr.i // restore psr.i addl r14=@gprel(ia64_leave_hypervisor_prepare),gp ;; KVM_SAVE_REST @@ -842,7 +842,7 @@ ENTRY(kvm_itlb_miss_dispatch) ;; srlz.i // guarantee that interruption collection is on ;; - //(p15) ssm psr.i // restore psr.i + (p15) ssm psr.i // restore psr.i addl r14=@gprel(ia64_leave_hypervisor),gp ;; KVM_SAVE_REST @@ -871,7 +871,7 @@ ENTRY(kvm_dispatch_reflection) ;; srlz.i // guarantee that interruption collection is on ;; - //(p15) ssm psr.i // restore psr.i + (p15) ssm psr.i // restore psr.i addl r14=@gprel(ia64_leave_hypervisor),gp ;; KVM_SAVE_REST @@ -898,7 +898,7 @@ ENTRY(kvm_dispatch_virtualization_fault) ;; srlz.i // guarantee that interruption collection is on ;; - //(p15) ssm psr.i // restore psr.i + (p15) ssm psr.i // restore psr.i addl r14=@gprel(ia64_leave_hypervisor_prepare),gp ;; KVM_SAVE_REST @@ -920,7 +920,7 @@ ENTRY(kvm_dispatch_interrupt) ;; srlz.i ;; - //(p15) ssm psr.i + (p15) ssm psr.i addl r14=@gprel(ia64_leave_hypervisor),gp ;; KVM_SAVE_REST @@ -1333,7 +1333,7 @@ hostret = r24 ;; (p7) srlz.i ;; -//(p6) ssm psr.i +(p6) ssm psr.i ;; mov rp=rpsave mov ar.pfs=pfssave diff --git a/arch/ia64/kvm/vtlb.c b/arch/ia64/kvm/vtlb.c index 38232b3..d46e267 100644 --- a/arch/ia64/kvm/vtlb.c +++ b/arch/ia64/kvm/vtlb.c @@ -253,7 +253,8 @@ u64 guest_vhpt_lookup(u64 iha, u64 *pte) "(p7) st8 [%2]=r9;;" "ssm psr.ic;;" "srlz.d;;" - /* "ssm psr.i;;" Once interrupts in vmm open, need fix*/ + "ssm psr.i;;" + "srlz.d;;" : "=r"(ret) : "r"(iha), "r"(pte):"memory"); return ret;