From patchwork Wed Jun 17 13:50:36 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 30881 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n5HDlhb0005250 for ; Wed, 17 Jun 2009 13:47:44 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1764775AbZFQNrf (ORCPT ); Wed, 17 Jun 2009 09:47:35 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1762208AbZFQNre (ORCPT ); Wed, 17 Jun 2009 09:47:34 -0400 Received: from outbound-dub.frontbridge.com ([213.199.154.16]:12956 "EHLO IE1EHSOBE005.bigfish.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1763407AbZFQNrd (ORCPT ); Wed, 17 Jun 2009 09:47:33 -0400 Received: from mail62-dub-R.bigfish.com (10.5.252.3) by IE1EHSOBE005.bigfish.com (10.5.252.25) with Microsoft SMTP Server id 8.1.340.0; Wed, 17 Jun 2009 13:47:36 +0000 Received: from mail62-dub (localhost.localdomain [127.0.0.1]) by mail62-dub-R.bigfish.com (Postfix) with ESMTP id 80ED51508160; Wed, 17 Jun 2009 13:47:35 +0000 (UTC) X-SpamScore: 3 X-BigFish: VPS3(zzzz1202hzzz32i17ch43j63h) X-Spam-TCS-SCL: 2:0 Received: by mail62-dub (MessageSwitch) id 1245246453354245_5463; Wed, 17 Jun 2009 13:47:33 +0000 (UCT) Received: from ausb3extmailp01.amd.com (unknown [163.181.251.8]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail62-dub.bigfish.com (Postfix) with ESMTP id A650BB50062; Wed, 17 Jun 2009 13:47:32 +0000 (UTC) Received: from ausb3twp02.amd.com ([163.181.250.38]) by ausb3extmailp01.amd.com (Switch-3.2.7/Switch-3.2.7) with ESMTP id n5HDlP23025863; Wed, 17 Jun 2009 08:47:28 -0500 X-WSS-ID: 0KLDYAW-02-MGM-01 Received: from sausexbh2.amd.com (SAUSEXBH2.amd.com [163.181.22.102]) by ausb3twp02.amd.com (Tumbleweed MailGate 3.5.1) with ESMTP id 2A82A16A03C9; Wed, 17 Jun 2009 08:47:19 -0500 (CDT) Received: from SAUSEXMB3.amd.com ([163.181.22.202]) by sausexbh2.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 17 Jun 2009 08:47:27 -0500 Received: from SDRSEXMB1.amd.com ([172.20.3.116]) by SAUSEXMB3.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 17 Jun 2009 08:47:26 -0500 Received: from localhost.localdomain ([165.204.15.42]) by SDRSEXMB1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 17 Jun 2009 15:47:09 +0200 From: Andre Przywara To: avi@redhat.com CC: kvm@vger.kernel.org, Andre Przywara , Christoph Egger , Amit Shah Subject: [PATCH 6/6] add sysexit emulation Date: Wed, 17 Jun 2009 15:50:36 +0200 Message-ID: <1245246636-30760-7-git-send-email-andre.przywara@amd.com> X-Mailer: git-send-email 1.6.1.3 In-Reply-To: <1245246636-30760-1-git-send-email-andre.przywara@amd.com> References: <1245246636-30760-1-git-send-email-andre.przywara@amd.com> X-OriginalArrivalTime: 17 Jun 2009 13:47:09.0115 (UTC) FILETIME=[1BE578B0:01C9EF52] MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Handle #UD intercept of the sysexit instruction in 64bit mode returning to 32bit compat mode on an AMD host. Setup the segment descriptors for CS and SS and the EIP/ESP registers according to the manual. Signed-off-by: Christoph Egger Signed-off-by: Amit Shah Signed-off-by: Andre Przywara --- arch/x86/kvm/x86_emulate.c | 79 +++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 78 insertions(+), 1 deletions(-) diff --git a/arch/x86/kvm/x86_emulate.c b/arch/x86/kvm/x86_emulate.c index 2f62aaa..7df05cc 100644 --- a/arch/x86/kvm/x86_emulate.c +++ b/arch/x86/kvm/x86_emulate.c @@ -1548,6 +1548,80 @@ emulate_sysenter(struct x86_emulate_ctxt *ctxt) return 0; } +static int +emulate_sysexit(struct x86_emulate_ctxt *ctxt) +{ + struct decode_cache *c = &ctxt->decode; + struct kvm_segment cs, ss; + u64 msr_data; + int usermode; + + /* inject #UD if LOCK prefix is used */ + if (c->lock_prefix) + return -1; + + /* inject #GP if in real mode or paging is disabled */ + if (ctxt->mode == X86EMUL_MODE_REAL + || !(ctxt->vcpu->arch.cr0 & X86_CR0_PE)) { + kvm_inject_gp(ctxt->vcpu, 0); + return -1; + } + + /* sysexit must be called from CPL 0 */ + if (kvm_x86_ops->get_cpl(ctxt->vcpu) != 0) { + kvm_inject_gp(ctxt->vcpu, 0); + return -1; + } + + setup_syscalls_segments(ctxt, &cs, &ss); + + if ((c->rex_prefix & 0x8) != 0x0) + usermode = X86EMUL_MODE_PROT64; + else + usermode = X86EMUL_MODE_PROT32; + + /* We don't care about cs.g/ss.g bits + * (= 4kb granularity) so we have to set the effective + * limit here or we get a #GP in the guest, otherwise. + */ + cs.limit = 0xffffffff; + ss.limit = 0xffffffff; + + cs.dpl = 3; + ss.dpl = 3; + kvm_x86_ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_CS, &msr_data); + switch (usermode) { + case X86EMUL_MODE_PROT32: + cs.selector = (u16)(msr_data + 16); + if ((msr_data & 0xfffc) == 0x0) { + kvm_inject_gp(ctxt->vcpu, 0); + return -1; + } + ss.selector = (u16)(msr_data + 24); + break; + case X86EMUL_MODE_PROT64: + cs.selector = (u16)(msr_data + 32); + if (msr_data == 0x0) { + kvm_inject_gp(ctxt->vcpu, 0); + return -1; + } + ss.selector = cs.selector + 8; + cs.db = 0; + cs.l = 1; + break; + } + cs.selector |= SELECTOR_RPL_MASK; + ss.selector |= SELECTOR_RPL_MASK; + + kvm_x86_ops->set_segment(ctxt->vcpu, &cs, VCPU_SREG_CS); + kvm_x86_ops->set_segment(ctxt->vcpu, &ss, VCPU_SREG_SS); + + c->eip = ctxt->vcpu->arch.regs[VCPU_REGS_RDX]; + c->regs[VCPU_REGS_RSP] = ctxt->vcpu->arch.regs[VCPU_REGS_RCX]; + + return 0; +} + int x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) { @@ -2222,7 +2296,10 @@ twobyte_insn: goto writeback; break; case 0x35: /* sysexit */ - goto cannot_emulate; + if (emulate_sysexit(ctxt) == -1) + goto cannot_emulate; + else + goto writeback; break; case 0x40 ... 0x4f: /* cmov */ c->dst.val = c->dst.orig_val = c->src.val;