From patchwork Thu Jun 18 10:56:01 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 31097 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n5IAqpYT018477 for ; Thu, 18 Jun 2009 10:52:51 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753874AbZFRKwq (ORCPT ); Thu, 18 Jun 2009 06:52:46 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1753785AbZFRKwq (ORCPT ); Thu, 18 Jun 2009 06:52:46 -0400 Received: from outbound-dub.frontbridge.com ([213.199.154.16]:64886 "EHLO IE1EHSOBE004.bigfish.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751970AbZFRKwp (ORCPT ); Thu, 18 Jun 2009 06:52:45 -0400 Received: from mail106-dub-R.bigfish.com (10.5.252.3) by IE1EHSOBE004.bigfish.com (10.5.252.24) with Microsoft SMTP Server id 8.1.340.0; Thu, 18 Jun 2009 10:52:45 +0000 Received: from mail106-dub (localhost.localdomain [127.0.0.1]) by mail106-dub-R.bigfish.com (Postfix) with ESMTP id 0A63A308106; Thu, 18 Jun 2009 10:52:45 +0000 (UTC) X-SpamScore: 4 X-BigFish: VPS4(zz853kzz1202hzzz32i17ch65h) X-Spam-TCS-SCL: 4:0 Received: by mail106-dub (MessageSwitch) id 1245322364334444_2507; Thu, 18 Jun 2009 10:52:44 +0000 (UCT) Received: from ausb3extmailp02.amd.com (ausb3extmailp02.amd.com [163.181.251.22]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail106-dub.bigfish.com (Postfix) with ESMTP id EDFA11118055; Thu, 18 Jun 2009 10:52:43 +0000 (UTC) Received: from ausb3twp01.amd.com (ausb3twp01.amd.com [163.181.250.37]) by ausb3extmailp02.amd.com (Switch-3.2.7/Switch-3.2.7) with ESMTP id n5IAqdJF002947; Thu, 18 Jun 2009 05:52:42 -0500 X-WSS-ID: 0KLFKVN-01-5LE-01 Received: from sausexbh1.amd.com (sausexbh1.amd.com [163.181.22.101]) by ausb3twp01.amd.com (Tumbleweed MailGate 3.5.1) with ESMTP id 260431943C5; Thu, 18 Jun 2009 05:52:34 -0500 (CDT) Received: from SAUSEXMB3.amd.com ([163.181.22.202]) by sausexbh1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 18 Jun 2009 05:52:38 -0500 Received: from SDRSEXMB1.amd.com ([172.20.3.116]) by SAUSEXMB3.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 18 Jun 2009 05:52:38 -0500 Received: from localhost.localdomain ([165.204.15.42]) by SDRSEXMB1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 18 Jun 2009 12:52:28 +0200 From: Andre Przywara To: avi@redhat.com CC: kvm@vger.kernel.org, Andre Przywara , Christoph Egger , Amit Shah Subject: [PATCH 5/6 v2] add sysenter emulation Date: Thu, 18 Jun 2009 12:56:01 +0200 Message-ID: <1245322562-3682-2-git-send-email-andre.przywara@amd.com> X-Mailer: git-send-email 1.6.1.3 In-Reply-To: <1245322562-3682-1-git-send-email-andre.przywara@amd.com> References: <4A39FF5B.9080101@redhat.com> <1245322562-3682-1-git-send-email-andre.przywara@amd.com> X-OriginalArrivalTime: 18 Jun 2009 10:52:28.0038 (UTC) FILETIME=[DF19CA60:01C9F002] MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Handle #UD intercept of the sysenter instruction in 32bit compat mode on an AMD host. Setup the segment descriptors for CS and SS and the EIP/ESP registers according to the manual. Signed-off-by: Christoph Egger Signed-off-by: Amit Shah Signed-off-by: Andre Przywara --- arch/x86/kvm/x86_emulate.c | 70 +++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 69 insertions(+), 1 deletions(-) diff --git a/arch/x86/kvm/x86_emulate.c b/arch/x86/kvm/x86_emulate.c index d0a51c4..fdf75f6 100644 --- a/arch/x86/kvm/x86_emulate.c +++ b/arch/x86/kvm/x86_emulate.c @@ -1474,6 +1474,71 @@ emulate_syscall(struct x86_emulate_ctxt *ctxt) return 0; } +static int +emulate_sysenter(struct x86_emulate_ctxt *ctxt) +{ + struct decode_cache *c = &ctxt->decode; + struct kvm_segment cs, ss; + u64 msr_data; + + /* inject #UD if LOCK prefix is used */ + if (c->lock_prefix) + return -1; + + /* inject #GP if in real mode or paging is disabled */ + if (ctxt->mode == X86EMUL_MODE_REAL || + !(ctxt->vcpu->arch.cr0 & X86_CR0_PE)) { + kvm_inject_gp(ctxt->vcpu, 0); + return -1; + } + + /* XXX sysenter/sysexit have not been tested in 64bit mode. + * Therefore, we inject an #UD. + */ + if (ctxt->mode == X86EMUL_MODE_PROT64) + return -1; + + setup_syscalls_segments(ctxt, &cs, &ss); + + kvm_x86_ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_CS, &msr_data); + switch (ctxt->mode) { + case X86EMUL_MODE_PROT32: + if ((msr_data & 0xfffc) == 0x0) { + kvm_inject_gp(ctxt->vcpu, 0); + return -1; + } + break; + case X86EMUL_MODE_PROT64: + if (msr_data == 0x0) { + kvm_inject_gp(ctxt->vcpu, 0); + return -1; + } + break; + } + + ctxt->eflags &= ~(EFLG_VM | EFLG_IF | EFLG_RF); + cs.selector = (u16)msr_data; + cs.selector &= ~SELECTOR_RPL_MASK; + ss.selector = cs.selector + 8; + ss.selector &= ~SELECTOR_RPL_MASK; + if (ctxt->mode == X86EMUL_MODE_PROT64 + || is_long_mode(ctxt->vcpu)) { + cs.db = 0; + cs.l = 1; + } + + kvm_x86_ops->set_segment(ctxt->vcpu, &cs, VCPU_SREG_CS); + kvm_x86_ops->set_segment(ctxt->vcpu, &ss, VCPU_SREG_SS); + + kvm_x86_ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_EIP, &msr_data); + c->eip = msr_data; + + kvm_x86_ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_ESP, &msr_data); + c->regs[VCPU_REGS_RSP] = msr_data; + + return 0; +} + int x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) { @@ -2142,7 +2207,10 @@ twobyte_insn: c->dst.type = OP_NONE; break; case 0x34: /* sysenter */ - goto cannot_emulate; + if (emulate_sysenter(ctxt) == -1) + goto cannot_emulate; + else + goto writeback; break; case 0x35: /* sysexit */ goto cannot_emulate;