From patchwork Thu Jun 18 10:56:02 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 31098 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n5IAqpYU018477 for ; Thu, 18 Jun 2009 10:52:51 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753590AbZFRKwr (ORCPT ); Thu, 18 Jun 2009 06:52:47 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1753785AbZFRKwr (ORCPT ); Thu, 18 Jun 2009 06:52:47 -0400 Received: from va3ehsobe005.messaging.microsoft.com ([216.32.180.15]:16922 "EHLO VA3EHSOBE005.bigfish.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753560AbZFRKwp (ORCPT ); Thu, 18 Jun 2009 06:52:45 -0400 Received: from mail198-va3-R.bigfish.com (10.7.14.247) by VA3EHSOBE005.bigfish.com (10.7.40.25) with Microsoft SMTP Server id 8.1.340.0; Thu, 18 Jun 2009 10:52:48 +0000 Received: from mail198-va3 (localhost.localdomain [127.0.0.1]) by mail198-va3-R.bigfish.com (Postfix) with ESMTP id 047A713385FC; Thu, 18 Jun 2009 10:52:48 +0000 (UTC) X-SpamScore: 3 X-BigFish: VPS3(zzzz1202hzzz32i17ch43j62h) X-Spam-TCS-SCL: 1:0 Received: by mail198-va3 (MessageSwitch) id 1245322365302088_30720; Thu, 18 Jun 2009 10:52:45 +0000 (UCT) Received: from ausb3extmailp01.amd.com (unknown [163.181.251.8]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail198-va3.bigfish.com (Postfix) with ESMTP id 271731230055; Thu, 18 Jun 2009 10:52:45 +0000 (UTC) Received: from ausb3twp01.amd.com ([163.181.250.37]) by ausb3extmailp01.amd.com (Switch-3.2.7/Switch-3.2.7) with ESMTP id n5IAqbDu001072; Thu, 18 Jun 2009 05:52:40 -0500 X-WSS-ID: 0KLFKVO-01-5LF-01 Received: from sausexbh1.amd.com (sausexbh1.amd.com [163.181.22.101]) by ausb3twp01.amd.com (Tumbleweed MailGate 3.5.1) with ESMTP id 2E7091943C9; Thu, 18 Jun 2009 05:52:36 -0500 (CDT) Received: from SAUSEXMB3.amd.com ([163.181.22.202]) by sausexbh1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 18 Jun 2009 05:52:39 -0500 Received: from SDRSEXMB1.amd.com ([172.20.3.116]) by SAUSEXMB3.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 18 Jun 2009 05:52:39 -0500 Received: from localhost.localdomain ([165.204.15.42]) by SDRSEXMB1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 18 Jun 2009 12:52:28 +0200 From: Andre Przywara To: avi@redhat.com CC: kvm@vger.kernel.org, Andre Przywara , Christoph Egger , Amit Shah Subject: [PATCH 6/6 v2] add sysexit emulation Date: Thu, 18 Jun 2009 12:56:02 +0200 Message-ID: <1245322562-3682-3-git-send-email-andre.przywara@amd.com> X-Mailer: git-send-email 1.6.1.3 In-Reply-To: <1245322562-3682-2-git-send-email-andre.przywara@amd.com> References: <4A39FF5B.9080101@redhat.com> <1245322562-3682-1-git-send-email-andre.przywara@amd.com> <1245322562-3682-2-git-send-email-andre.przywara@amd.com> X-OriginalArrivalTime: 18 Jun 2009 10:52:28.0507 (UTC) FILETIME=[DF615AB0:01C9F002] MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Handle #UD intercept of the sysexit instruction in 64bit mode returning to 32bit compat mode on an AMD host. Setup the segment descriptors for CS and SS and the EIP/ESP registers according to the manual. Signed-off-by: Christoph Egger Signed-off-by: Amit Shah Signed-off-by: Andre Przywara --- arch/x86/kvm/x86_emulate.c | 72 +++++++++++++++++++++++++++++++++++++++++++- 1 files changed, 71 insertions(+), 1 deletions(-) diff --git a/arch/x86/kvm/x86_emulate.c b/arch/x86/kvm/x86_emulate.c index fdf75f6..6849868 100644 --- a/arch/x86/kvm/x86_emulate.c +++ b/arch/x86/kvm/x86_emulate.c @@ -1539,6 +1539,73 @@ emulate_sysenter(struct x86_emulate_ctxt *ctxt) return 0; } +static int +emulate_sysexit(struct x86_emulate_ctxt *ctxt) +{ + struct decode_cache *c = &ctxt->decode; + struct kvm_segment cs, ss; + u64 msr_data; + int usermode; + + /* inject #UD if LOCK prefix is used */ + if (c->lock_prefix) + return -1; + + /* inject #GP if in real mode or paging is disabled */ + if (ctxt->mode == X86EMUL_MODE_REAL + || !(ctxt->vcpu->arch.cr0 & X86_CR0_PE)) { + kvm_inject_gp(ctxt->vcpu, 0); + return -1; + } + + /* sysexit must be called from CPL 0 */ + if (kvm_x86_ops->get_cpl(ctxt->vcpu) != 0) { + kvm_inject_gp(ctxt->vcpu, 0); + return -1; + } + + setup_syscalls_segments(ctxt, &cs, &ss); + + if ((c->rex_prefix & 0x8) != 0x0) + usermode = X86EMUL_MODE_PROT64; + else + usermode = X86EMUL_MODE_PROT32; + + cs.dpl = 3; + ss.dpl = 3; + kvm_x86_ops->get_msr(ctxt->vcpu, MSR_IA32_SYSENTER_CS, &msr_data); + switch (usermode) { + case X86EMUL_MODE_PROT32: + cs.selector = (u16)(msr_data + 16); + if ((msr_data & 0xfffc) == 0x0) { + kvm_inject_gp(ctxt->vcpu, 0); + return -1; + } + ss.selector = (u16)(msr_data + 24); + break; + case X86EMUL_MODE_PROT64: + cs.selector = (u16)(msr_data + 32); + if (msr_data == 0x0) { + kvm_inject_gp(ctxt->vcpu, 0); + return -1; + } + ss.selector = cs.selector + 8; + cs.db = 0; + cs.l = 1; + break; + } + cs.selector |= SELECTOR_RPL_MASK; + ss.selector |= SELECTOR_RPL_MASK; + + kvm_x86_ops->set_segment(ctxt->vcpu, &cs, VCPU_SREG_CS); + kvm_x86_ops->set_segment(ctxt->vcpu, &ss, VCPU_SREG_SS); + + c->eip = ctxt->vcpu->arch.regs[VCPU_REGS_RDX]; + c->regs[VCPU_REGS_RSP] = ctxt->vcpu->arch.regs[VCPU_REGS_RCX]; + + return 0; +} + int x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) { @@ -2213,7 +2280,10 @@ twobyte_insn: goto writeback; break; case 0x35: /* sysexit */ - goto cannot_emulate; + if (emulate_sysexit(ctxt) == -1) + goto cannot_emulate; + else + goto writeback; break; case 0x40 ... 0x4f: /* cmov */ c->dst.val = c->dst.orig_val = c->src.val;