From patchwork Fri Jul 3 14:00:14 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 33953 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n63E4POv018961 for ; Fri, 3 Jul 2009 14:04:25 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757512AbZGCOBE (ORCPT ); Fri, 3 Jul 2009 10:01:04 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1757592AbZGCOBE (ORCPT ); Fri, 3 Jul 2009 10:01:04 -0400 Received: from va3ehsobe003.messaging.microsoft.com ([216.32.180.13]:6242 "EHLO VA3EHSOBE003.bigfish.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1757651AbZGCOBD (ORCPT ); Fri, 3 Jul 2009 10:01:03 -0400 Received: from mail8-va3-R.bigfish.com (10.7.14.248) by VA3EHSOBE003.bigfish.com (10.7.40.23) with Microsoft SMTP Server id 8.1.340.0; Fri, 3 Jul 2009 14:01:05 +0000 Received: from mail8-va3 (localhost.localdomain [127.0.0.1]) by mail8-va3-R.bigfish.com (Postfix) with ESMTP id B67295F8851; Fri, 3 Jul 2009 14:01:05 +0000 (UTC) X-SpamScore: 3 X-BigFish: VPS3(zzzz1202hzzz32i43j64h) X-Spam-TCS-SCL: 3:0 Received: by mail8-va3 (MessageSwitch) id 1246629664520497_18977; Fri, 3 Jul 2009 14:01:04 +0000 (UCT) Received: from ausb3extmailp01.amd.com (unknown [163.181.251.8]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail8-va3.bigfish.com (Postfix) with ESMTP id 4EB085F0054; Fri, 3 Jul 2009 14:01:04 +0000 (UTC) Received: from ausb3twp01.amd.com ([163.181.250.37]) by ausb3extmailp01.amd.com (Switch-3.2.7/Switch-3.2.7) with ESMTP id n63E0vhT006486; Fri, 3 Jul 2009 09:01:00 -0500 X-WSS-ID: 0KM7LLH-01-VQ2-01 Received: from sausexbh2.amd.com (SAUSEXBH2.amd.com [163.181.22.102]) by ausb3twp01.amd.com (Tumbleweed MailGate 3.5.1) with ESMTP id 2E46F1943FF; Fri, 3 Jul 2009 09:00:52 -0500 (CDT) Received: from sausexmb1.amd.com ([163.181.3.156]) by sausexbh2.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 3 Jul 2009 09:00:59 -0500 Received: from SDRSEXMB1.amd.com ([172.20.3.116]) by sausexmb1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 3 Jul 2009 09:00:49 -0500 Received: from localhost.localdomain ([165.204.15.42]) by SDRSEXMB1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 3 Jul 2009 16:00:05 +0200 From: Andre Przywara To: avi@redhat.com CC: kvm@vger.kernel.org, Andre Przywara Subject: [PATCH] handle AMD microcode MSR Date: Fri, 3 Jul 2009 16:00:14 +0200 Message-ID: <1246629614-29202-1-git-send-email-andre.przywara@amd.com> X-Mailer: git-send-email 1.6.1.3 X-OriginalArrivalTime: 03 Jul 2009 14:00:05.0688 (UTC) FILETIME=[91611B80:01C9FBE6] MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Windows 7 tries to update the CPU's microcode on some processors, so we ignore the MSR write here. The patchlevel register is already handled (returning 0), because the MSR number is the same as Intel's. Signed-off-by: Andre Przywara --- arch/x86/kvm/x86.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 60b2527..4f9789d 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -870,6 +870,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) case MSR_IA32_UCODE_REV: case MSR_IA32_UCODE_WRITE: case MSR_VM_HSAVE_PA: + case MSR_AMD64_PATCH_LOADER: break; case 0x200 ... 0x2ff: return set_msr_mtrr(vcpu, msr, data);