diff mbox

KVM: Fix EPT with WP bit change during paging

Message ID 1250646738-27235-1-git-send-email-sheng@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Sheng Yang Aug. 19, 2009, 1:52 a.m. UTC 
QNX update WP bit when paging enabled, which is not covered yet. This one fix
QNX boot with EPT.

Signed-off-by: Sheng Yang <sheng@linux.intel.com>
---

I think it's also necessary for 2.6.31?

 arch/x86/kvm/vmx.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

Comments

Avi Kivity Aug. 19, 2009, 8:16 a.m. UTC | #1 
On 08/19/2009 04:52 AM, Sheng Yang wrote:
> QNX update WP bit when paging enabled, which is not covered yet. This one fix
> QNX boot with EPT.
>    

Applied, thanks.

> I think it's also necessary for 2.6.31?
>    

It's not a recent regression, right?  So I'll send it for 2.6.32 and 
afterwards to 2.6.31.stable.
diff mbox

Patch

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 2b7e7bd..1ee811c 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -1642,7 +1642,6 @@  static void ept_update_paging_mode_cr0(unsigned long *hw_cr0,
 			      CPU_BASED_CR3_STORE_EXITING));
 		vcpu->arch.cr0 = cr0;
 		vmx_set_cr4(vcpu, vcpu->arch.cr4);
-		*hw_cr0 &= ~X86_CR0_WP;
 	} else if (!is_paging(vcpu)) {
 		/* From nonpaging to paging */
 		vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
@@ -1651,9 +1650,10 @@  static void ept_update_paging_mode_cr0(unsigned long *hw_cr0,
 			       CPU_BASED_CR3_STORE_EXITING));
 		vcpu->arch.cr0 = cr0;
 		vmx_set_cr4(vcpu, vcpu->arch.cr4);
-		if (!(vcpu->arch.cr0 & X86_CR0_WP))
-			*hw_cr0 &= ~X86_CR0_WP;
 	}
+
+	if (!(cr0 & X86_CR0_WP))
+		*hw_cr0 &= ~X86_CR0_WP;
 }
 
 static void ept_update_paging_mode_cr4(unsigned long *hw_cr4,