From patchwork Wed Sep 16 13:24:18 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joerg Roedel X-Patchwork-Id: 47987 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n8GDTPRb004915 for ; Wed, 16 Sep 2009 13:29:26 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756082AbZIPN1M (ORCPT ); Wed, 16 Sep 2009 09:27:12 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1752280AbZIPN1K (ORCPT ); Wed, 16 Sep 2009 09:27:10 -0400 Received: from tx2ehsobe005.messaging.microsoft.com ([65.55.88.15]:25852 "EHLO TX2EHSOBE010.bigfish.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752669AbZIPNYv (ORCPT ); Wed, 16 Sep 2009 09:24:51 -0400 Received: from mail117-tx2-R.bigfish.com (10.9.14.246) by TX2EHSOBE010.bigfish.com (10.9.40.30) with Microsoft SMTP Server id 8.1.340.0; Wed, 16 Sep 2009 13:24:54 +0000 Received: from mail117-tx2 (localhost.localdomain [127.0.0.1]) by mail117-tx2-R.bigfish.com (Postfix) with ESMTP id 8DFFF8A8361; Wed, 16 Sep 2009 13:24:54 +0000 (UTC) X-SpamScore: 1 X-BigFish: VPS1(zzzz1202hzzz32i203h62h) X-Spam-TCS-SCL: 1:0 Received: by mail117-tx2 (MessageSwitch) id 1253107492930885_21365; Wed, 16 Sep 2009 13:24:52 +0000 (UCT) Received: from ausb3extmailp02.amd.com (ausb3extmailp02.amd.com [163.181.251.22]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail117-tx2.bigfish.com (Postfix) with ESMTP id 9F54711D8052; Wed, 16 Sep 2009 13:24:52 +0000 (UTC) Received: from ausb3twp01.amd.com (ausb3twp01.amd.com [163.181.250.37]) by ausb3extmailp02.amd.com (Switch-3.2.7/Switch-3.2.7) with ESMTP id n8GDOmVS029247; Wed, 16 Sep 2009 08:24:51 -0500 X-WSS-ID: 0KQ2FX9-01-3NO-02 X-M-MSG: Received: from sausexbh1.amd.com (sausexbh1.amd.com [163.181.22.101]) by ausb3twp01.amd.com (Tumbleweed MailGate 3.7.0) with ESMTP id 2E9401028501; Wed, 16 Sep 2009 08:24:44 -0500 (CDT) Received: from sausexmb4.amd.com ([163.181.3.15]) by sausexbh1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 16 Sep 2009 08:24:47 -0500 Received: from SDRSEXMB1.amd.com ([172.20.3.116]) by sausexmb4.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 16 Sep 2009 08:24:47 -0500 Received: from seurexmb1.amd.com ([165.204.9.130]) by SDRSEXMB1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 16 Sep 2009 15:24:31 +0200 Received: from lemmy.amd.com ([165.204.15.93]) by seurexmb1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 16 Sep 2009 15:24:23 +0200 Received: by lemmy.amd.com (Postfix, from userid 41430) id C0D78C9AD4; Wed, 16 Sep 2009 15:24:22 +0200 (CEST) From: Joerg Roedel To: Avi Kivity CC: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alexander Graf , Joerg Roedel Subject: [PATCH 4/5] KVM: SVM: Handle tsc in svm_get_msr/svm_set_msr correctly Date: Wed, 16 Sep 2009 15:24:18 +0200 Message-ID: <1253107459-8967-5-git-send-email-joerg.roedel@amd.com> X-Mailer: git-send-email 1.6.3.3 In-Reply-To: <1253107459-8967-1-git-send-email-joerg.roedel@amd.com> References: <1253107459-8967-1-git-send-email-joerg.roedel@amd.com> X-OriginalArrivalTime: 16 Sep 2009 13:24:23.0421 (UTC) FILETIME=[01785AD0:01CA36D1] MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org When running nested we need to touch the l1 guests tsc_offset. Otherwise changes will be lost or a wrong value be read. Signed-off-by: Joerg Roedel --- arch/x86/kvm/svm.c | 23 +++++++++++++++++------ 1 files changed, 17 insertions(+), 6 deletions(-) diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 84c2c78..e193cf9 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -2059,10 +2059,14 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data) switch (ecx) { case MSR_IA32_TSC: { - u64 tsc; + u64 tsc_offset; - rdtscll(tsc); - *data = svm->vmcb->control.tsc_offset + tsc; + if (is_nested(svm)) + tsc_offset = svm->nested.hsave->control.tsc_offset; + else + tsc_offset = svm->vmcb->control.tsc_offset; + + *data = tsc_offset + native_read_tsc(); break; } case MSR_K6_STAR: @@ -2148,10 +2152,17 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data) switch (ecx) { case MSR_IA32_TSC: { - u64 tsc; + u64 tsc_offset = data - native_read_tsc(); + u64 g_tsc_offset = 0; + + if (is_nested(svm)) { + g_tsc_offset = svm->vmcb->control.tsc_offset - + svm->nested.hsave->control.tsc_offset; + svm->nested.hsave->control.tsc_offset = tsc_offset; + } + + svm->vmcb->control.tsc_offset = tsc_offset + g_tsc_offset; - rdtscll(tsc); - svm->vmcb->control.tsc_offset = data - tsc; break; } case MSR_K6_STAR: