From patchwork Wed Feb 24 17:59:18 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joerg Roedel X-Patchwork-Id: 81788 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o1OI0vsi001829 for ; Wed, 24 Feb 2010 18:00:58 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757459Ab0BXSAt (ORCPT ); Wed, 24 Feb 2010 13:00:49 -0500 Received: from tx2ehsobe003.messaging.microsoft.com ([65.55.88.13]:8098 "EHLO TX2EHSOBE006.bigfish.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757506Ab0BXR7o (ORCPT ); Wed, 24 Feb 2010 12:59:44 -0500 Received: from mail40-tx2-R.bigfish.com (10.9.14.238) by TX2EHSOBE006.bigfish.com (10.9.40.26) with Microsoft SMTP Server id 8.1.340.0; Wed, 24 Feb 2010 17:59:42 +0000 Received: from mail40-tx2 (localhost [127.0.0.1]) by mail40-tx2-R.bigfish.com (Postfix) with ESMTP id 1CD1E11C82CF; Wed, 24 Feb 2010 17:59:42 +0000 (UTC) X-SpamScore: -4 X-BigFish: VPS-4(zz936eMab9bhzz1202hzzz32i6bh87h62h) X-Spam-TCS-SCL: 1:0 X-FB-DOMAIN-IP-MATCH: fail Received: from mail40-tx2 (localhost.localdomain [127.0.0.1]) by mail40-tx2 (MessageSwitch) id 1267034380262064_26058; Wed, 24 Feb 2010 17:59:40 +0000 (UTC) Received: from TX2EHSMHS009.bigfish.com (unknown [10.9.14.241]) by mail40-tx2.bigfish.com (Postfix) with ESMTP id 3BE581AD8050; Wed, 24 Feb 2010 17:59:40 +0000 (UTC) Received: from ausb3extmailp02.amd.com (163.181.251.22) by TX2EHSMHS009.bigfish.com (10.9.99.109) with Microsoft SMTP Server (TLS) id 14.0.482.39; Wed, 24 Feb 2010 17:59:38 +0000 Received: from ausb3twp02.amd.com ([163.181.250.38]) by ausb3extmailp02.amd.com (Switch-3.2.7/Switch-3.2.7) with ESMTP id o1OI2YhN016936; Wed, 24 Feb 2010 12:02:37 -0600 X-WSS-ID: 0KYCXZ4-02-PJX-02 X-M-MSG: Received: from sausexbh2.amd.com (SAUSEXBH2.amd.com [163.181.22.102]) by ausb3twp02.amd.com (Tumbleweed MailGate 3.7.2) with ESMTP id 2F793C8A36; Wed, 24 Feb 2010 11:59:28 -0600 (CST) Received: from sausexmb1.amd.com ([163.181.3.156]) by sausexbh2.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 24 Feb 2010 11:59:33 -0600 Received: from seurexmb1.amd.com ([165.204.9.130]) by sausexmb1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 24 Feb 2010 11:59:33 -0600 Received: from lemmy.osrc.amd.com ([165.204.15.93]) by seurexmb1.amd.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 24 Feb 2010 18:59:23 +0100 Received: by lemmy.osrc.amd.com (Postfix, from userid 41430) id 77FB2C9B69; Wed, 24 Feb 2010 18:59:23 +0100 (CET) From: Joerg Roedel To: Avi Kivity , Marcelo Tosatti CC: Alexander Graf , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Joerg Roedel Subject: [PATCH 09/11] KVM: SVM: Handle nested selective_cr0 intercept correctly Date: Wed, 24 Feb 2010 18:59:18 +0100 Message-ID: <1267034360-5907-10-git-send-email-joerg.roedel@amd.com> X-Mailer: git-send-email 1.7.0 In-Reply-To: <1267034360-5907-1-git-send-email-joerg.roedel@amd.com> References: <1267034360-5907-1-git-send-email-joerg.roedel@amd.com> X-OriginalArrivalTime: 24 Feb 2010 17:59:23.0683 (UTC) FILETIME=[18E64730:01CAB57B] MIME-Version: 1.0 X-Reverse-DNS: ausb3extmailp02.amd.com Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Wed, 24 Feb 2010 18:00:58 +0000 (UTC) diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 2450a7c..22654de 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -1037,6 +1037,27 @@ static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) { struct vcpu_svm *svm = to_svm(vcpu); + if (is_nested(svm)) { + /* + * We are here because we run in nested mode, the host kvm + * intercepts cr0 writes but the l1 hypervisor does not. + * But the L1 hypervisor may intercept selective cr0 writes. + * This needs to be checked here. + */ + unsigned long old, new; + + /* Remove bits that would trigger a real cr0 write intercept */ + old = vcpu->arch.cr0 & SVM_CR0_SELECTIVE_MASK; + new = cr0 & SVM_CR0_SELECTIVE_MASK; + + if (old == new) { + /* cr0 write with ts and mp unchanged */ + svm->vmcb->control.exit_code = SVM_EXIT_CR0_SEL_WRITE; + if (nested_svm_exit_handled(svm) == NESTED_EXIT_DONE) + return; + } + } + #ifdef CONFIG_X86_64 if (vcpu->arch.efer & EFER_LME) { if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {