From patchwork Tue Jun 8 17:55:01 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Lalancette X-Patchwork-Id: 105001 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o58HvPjd004985 for ; Tue, 8 Jun 2010 17:57:25 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756107Ab0FHR5V (ORCPT ); Tue, 8 Jun 2010 13:57:21 -0400 Received: from mx1.redhat.com ([209.132.183.28]:18693 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755723Ab0FHR5U (ORCPT ); Tue, 8 Jun 2010 13:57:20 -0400 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o58HvJWT006532 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Tue, 8 Jun 2010 13:57:19 -0400 Received: from localhost.localdomain (dhcp-100-19-171.bos.redhat.com [10.16.19.171]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id o58HvI7q027074; Tue, 8 Jun 2010 13:57:19 -0400 From: Chris Lalancette To: kvm@vger.kernel.org Cc: avi@redhat.com, mtosatti@redhat.com, Chris Lalancette Subject: [RFC][PATCH 1/3] Introduce a workqueue to deliver PIT timer interrupts. Date: Tue, 8 Jun 2010 13:55:01 -0400 Message-Id: <1276019703-18136-2-git-send-email-clalance@redhat.com> In-Reply-To: <1276019703-18136-1-git-send-email-clalance@redhat.com> References: <1276019703-18136-1-git-send-email-clalance@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Tue, 08 Jun 2010 17:57:25 +0000 (UTC) diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c index 188d827..dd655ef 100644 --- a/arch/x86/kvm/i8254.c +++ b/arch/x86/kvm/i8254.c @@ -34,6 +34,7 @@ #include #include +#include #include "irq.h" #include "i8254.h" @@ -49,6 +50,8 @@ #define RW_STATE_WORD0 3 #define RW_STATE_WORD1 4 +static struct workqueue_struct *pit_wq; + /* Compute with 96 bit intermediate result: (a*b)/c */ static u64 muldiv64(u64 a, u32 b, u32 c) { @@ -281,6 +284,58 @@ static struct kvm_timer_ops kpit_ops = { .is_periodic = kpit_is_periodic, }; +static void pit_do_work(struct work_struct *work) +{ + struct kvm_pit *pit = container_of(work, struct kvm_pit, expired); + struct kvm *kvm = pit->kvm; + struct kvm_vcpu *vcpu; + int i; + struct kvm_kpit_state *ps = &pit->pit_state; + int inject = 0; + + /* Try to inject pending interrupts when + * last one has been acked. + */ + raw_spin_lock(&ps->inject_lock); + if (ps->irq_ack) { + ps->irq_ack = 0; + inject = 1; + } + raw_spin_unlock(&ps->inject_lock); + if (inject) { + kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1); + kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0); + + /* + * Provides NMI watchdog support via Virtual Wire mode. + * The route is: PIT -> PIC -> LVT0 in NMI mode. + * + * Note: Our Virtual Wire implementation is simplified, only + * propagating PIT interrupts to all VCPUs when they have set + * LVT0 to NMI delivery. Other PIC interrupts are just sent to + * VCPU0, and only if its LVT0 is in EXTINT mode. + */ + if (kvm->arch.vapics_in_nmi_mode > 0) + kvm_for_each_vcpu(i, vcpu, kvm) + kvm_apic_nmi_wd_deliver(vcpu); + } +} + +static enum hrtimer_restart pit_timer_fn(struct hrtimer *data) +{ + struct kvm_timer *ktimer = container_of(data, struct kvm_timer, timer); + struct kvm_pit *pt = ktimer->kvm->arch.vpit; + + queue_work(pit_wq, &pt->expired); + + if (ktimer->t_ops->is_periodic(ktimer)) { + hrtimer_add_expires_ns(&ktimer->timer, ktimer->period); + return HRTIMER_RESTART; + } + else + return HRTIMER_NORESTART; +} + static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period) { struct kvm_timer *pt = &ps->pit_timer; @@ -295,10 +350,9 @@ static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period) pt->period = interval; ps->is_periodic = is_period; - pt->timer.function = kvm_timer_fn; + pt->timer.function = pit_timer_fn; pt->t_ops = &kpit_ops; pt->kvm = ps->pit->kvm; - pt->vcpu = pt->kvm->bsp_vcpu; atomic_set(&pt->pending, 0); ps->irq_ack = 1; @@ -628,6 +682,8 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags) mutex_lock(&pit->pit_state.lock); raw_spin_lock_init(&pit->pit_state.inject_lock); + INIT_WORK(&pit->expired, pit_do_work); + kvm->arch.vpit = pit; pit->kvm = kvm; @@ -691,48 +747,16 @@ void kvm_free_pit(struct kvm *kvm) } } -static void __inject_pit_timer_intr(struct kvm *kvm) +int kvm_pit_create(void) { - struct kvm_vcpu *vcpu; - int i; + pit_wq = create_singlethread_workqueue("kvm-pit-wq"); + if (!pit_wq) + return -ENOMEM; - kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1); - kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0); - - /* - * Provides NMI watchdog support via Virtual Wire mode. - * The route is: PIT -> PIC -> LVT0 in NMI mode. - * - * Note: Our Virtual Wire implementation is simplified, only - * propagating PIT interrupts to all VCPUs when they have set - * LVT0 to NMI delivery. Other PIC interrupts are just sent to - * VCPU0, and only if its LVT0 is in EXTINT mode. - */ - if (kvm->arch.vapics_in_nmi_mode > 0) - kvm_for_each_vcpu(i, vcpu, kvm) - kvm_apic_nmi_wd_deliver(vcpu); + return 0; } -void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu) +void kvm_pit_cleanup(void) { - struct kvm_pit *pit = vcpu->kvm->arch.vpit; - struct kvm *kvm = vcpu->kvm; - struct kvm_kpit_state *ps; - - if (pit) { - int inject = 0; - ps = &pit->pit_state; - - /* Try to inject pending interrupts when - * last one has been acked. - */ - raw_spin_lock(&ps->inject_lock); - if (atomic_read(&ps->pit_timer.pending) && ps->irq_ack) { - ps->irq_ack = 0; - inject = 1; - } - raw_spin_unlock(&ps->inject_lock); - if (inject) - __inject_pit_timer_intr(kvm); - } + destroy_workqueue(pit_wq); } diff --git a/arch/x86/kvm/i8254.h b/arch/x86/kvm/i8254.h index 900d6b0..78db13d 100644 --- a/arch/x86/kvm/i8254.h +++ b/arch/x86/kvm/i8254.h @@ -40,6 +40,7 @@ struct kvm_pit { struct kvm_kpit_state pit_state; int irq_source_id; struct kvm_irq_mask_notifier mask_notifier; + struct work_struct expired; }; #define KVM_PIT_BASE_ADDRESS 0x40 @@ -55,4 +56,7 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags); void kvm_free_pit(struct kvm *kvm); void kvm_pit_reset(struct kvm_pit *pit); +int kvm_pit_create(void); +void kvm_pit_cleanup(void); + #endif diff --git a/arch/x86/kvm/irq.c b/arch/x86/kvm/irq.c index 0f4e488..2095a04 100644 --- a/arch/x86/kvm/irq.c +++ b/arch/x86/kvm/irq.c @@ -90,7 +90,6 @@ EXPORT_SYMBOL_GPL(kvm_cpu_get_interrupt); void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu) { kvm_inject_apic_timer_irqs(vcpu); - kvm_inject_pit_timer_irqs(vcpu); /* TODO: PIT, RTC etc. */ } EXPORT_SYMBOL_GPL(kvm_inject_pending_timer_irqs); diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 5fa8684..a8cf1e1 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -4125,6 +4125,8 @@ int kvm_arch_init(void *opaque) perf_register_guest_info_callbacks(&kvm_guest_cbs); + kvm_pit_create(); + return 0; out: @@ -4133,6 +4135,8 @@ out: void kvm_arch_exit(void) { + kvm_pit_cleanup(); + perf_unregister_guest_info_callbacks(&kvm_guest_cbs); if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))