From patchwork Wed Jun 23 21:09:37 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 107688 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.4/8.14.3) with ESMTP id o5NLQDN8017970 for ; Wed, 23 Jun 2010 21:26:13 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753384Ab0FWV0L (ORCPT ); Wed, 23 Jun 2010 17:26:11 -0400 Received: from outbound-va3.frontbridge.com ([216.32.180.16]:40991 "EHLO VA3EHSOBE009.bigfish.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753335Ab0FWV0K (ORCPT ); Wed, 23 Jun 2010 17:26:10 -0400 Received: from mail190-va3-R.bigfish.com (10.7.14.250) by VA3EHSOBE009.bigfish.com (10.7.40.29) with Microsoft SMTP Server id 8.1.340.0; Wed, 23 Jun 2010 21:11:06 +0000 Received: from mail190-va3 (localhost.localdomain [127.0.0.1]) by mail190-va3-R.bigfish.com (Postfix) with ESMTP id CB04311985B2; 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Wed, 23 Jun 2010 16:10:37 -0500 (CDT) Received: from storexhtp01.amd.com (172.24.4.3) by sausexhtp01.amd.com (163.181.3.165) with Microsoft SMTP Server (TLS) id 8.2.254.0; Wed, 23 Jun 2010 16:10:39 -0500 Received: from gwo.osrc.amd.com (165.204.16.204) by storexhtp01.amd.com (172.24.4.3) with Microsoft SMTP Server id 8.2.254.0; Wed, 23 Jun 2010 17:10:33 -0400 Received: from localhost.localdomain (tronje.osrc.amd.com [165.204.15.48]) by gwo.osrc.amd.com (Postfix) with ESMTP id 5397949C174; Wed, 23 Jun 2010 22:10:33 +0100 (BST) From: Andre Przywara To: CC: , , Andre Przywara Subject: [PATCH 3/3] NUMA: realize NUMA memory pinning Date: Wed, 23 Jun 2010 23:09:37 +0200 Message-ID: <1277327377-29629-4-git-send-email-andre.przywara@amd.com> X-Mailer: git-send-email 1.6.4 In-Reply-To: <1277327377-29629-1-git-send-email-andre.przywara@amd.com> References: <1277327377-29629-1-git-send-email-andre.przywara@amd.com> MIME-Version: 1.0 X-Reverse-DNS: ausb3extmailp02.amd.com Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Wed, 23 Jun 2010 21:26:14 +0000 (UTC) diff --git a/hw/pc.c b/hw/pc.c index 1f61609..b6d4d7a 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -41,6 +41,11 @@ #include "device-assignment.h" #include "kvm.h" +#ifdef CONFIG_NUMA +#include +#include +#endif + /* output Bochs bios info messages */ //#define DEBUG_BIOS @@ -874,6 +879,49 @@ void pc_cpus_init(const char *cpu_model) } } +static void bind_numa(ram_addr_t ram_addr, ram_addr_t border_4g, + int below_4g) +{ +#ifdef CONFIG_NUMA + int i, skip; + char* ram_ptr; + nodemask_t nodemask; + ram_addr_t len, ram_offset; + + ram_ptr = qemu_get_ram_ptr(ram_addr); + + ram_offset = 0; + skip = !below_4g; + for (i = 0; i < nb_numa_nodes; i++) { + len = node_mem[i]; + if (ram_offset <= border_4g && ram_offset + len > border_4g) { + len = border_4g - ram_offset; + if (skip) { + ram_offset = 0; + len = node_mem[i] - len; + skip = 0; + } + } + if (skip && ram_offset + len <= border_4g) { + ram_offset += len; + continue; + } + if (!skip && node_pin[i] >= 0) { + nodemask_zero(&nodemask); + nodemask_set_compat(&nodemask, node_pin[i]); + if (mbind(ram_ptr + ram_offset, len, MPOL_BIND, + nodemask.n, NUMA_NUM_NODES, 0)) { + perror("mbind"); + } + } + ram_offset += len; + if (below_4g && ram_offset >= border_4g) + return; + } +#endif + return; +} + void pc_memory_init(ram_addr_t ram_size, const char *kernel_filename, const char *kernel_cmdline, @@ -906,6 +954,8 @@ void pc_memory_init(ram_addr_t ram_size, below_4g_mem_size - 0x100000, ram_addr + 0x100000); + bind_numa(ram_addr, below_4g_mem_size, 1); + /* above 4giga memory allocation */ if (above_4g_mem_size > 0) { #if TARGET_PHYS_ADDR_BITS == 32 @@ -915,6 +965,7 @@ void pc_memory_init(ram_addr_t ram_size, cpu_register_physical_memory(0x100000000ULL, above_4g_mem_size, ram_addr); + bind_numa(ram_addr, below_4g_mem_size, 0); #endif }