From patchwork Mon Sep 6 15:55:55 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joerg Roedel X-Patchwork-Id: 159081 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o86G22wY023057 for ; Mon, 6 Sep 2010 16:02:09 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755301Ab0IFQBx (ORCPT ); Mon, 6 Sep 2010 12:01:53 -0400 Received: from va3ehsobe006.messaging.microsoft.com ([216.32.180.16]:48413 "EHLO VA3EHSOBE008.bigfish.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754888Ab0IFP5m (ORCPT ); Mon, 6 Sep 2010 11:57:42 -0400 Received: from mail109-va3-R.bigfish.com (10.7.14.249) by VA3EHSOBE008.bigfish.com (10.7.40.28) with Microsoft SMTP Server id 8.1.340.0; Mon, 6 Sep 2010 15:57:41 +0000 Received: from mail109-va3 (localhost.localdomain [127.0.0.1]) by mail109-va3-R.bigfish.com (Postfix) with ESMTP id 4739452815E; Mon, 6 Sep 2010 15:57:41 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zz10d1Izz1202hzz8275bhz32i87h2a8h43h62h) X-Spam-TCS-SCL: 1:0 X-FB-DOMAIN-IP-MATCH: fail Received: from mail109-va3 (localhost.localdomain [127.0.0.1]) by mail109-va3 (MessageSwitch) id 1283788660869449_21126; Mon, 6 Sep 2010 15:57:40 +0000 (UTC) Received: from VA3EHSMHS008.bigfish.com (unknown [10.7.14.238]) by mail109-va3.bigfish.com (Postfix) with ESMTP id D0898191804E; Mon, 6 Sep 2010 15:57:40 +0000 (UTC) Received: from ausb3extmailp01.amd.com (163.181.251.8) by VA3EHSMHS008.bigfish.com (10.7.99.18) with Microsoft SMTP Server (TLS) id 14.0.482.44; Mon, 6 Sep 2010 15:57:20 +0000 Received: from ausb3twp02.amd.com ([163.181.250.38]) by ausb3extmailp01.amd.com (Switch-3.2.7/Switch-3.2.7) with SMTP id o86FwPhL024305; Mon, 6 Sep 2010 10:58:54 -0500 X-WSS-ID: 0L8C1L7-02-79Z-02 X-M-MSG: Received: from sausexhtp01.amd.com (sausexhtp01.amd.com [163.181.3.165]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (No client certificate requested) by ausb3twp02.amd.com (Tumbleweed MailGate 3.7.2) with ESMTP id 2F2E5C8629; Mon, 6 Sep 2010 10:55:54 -0500 (CDT) Received: from storexhtp02.amd.com (172.24.4.4) by sausexhtp01.amd.com (163.181.3.165) with Microsoft SMTP Server (TLS) id 8.3.83.0; Mon, 6 Sep 2010 10:55:59 -0500 Received: from gwo.osrc.amd.com (165.204.16.204) by storexhtp02.amd.com (172.24.4.4) with Microsoft SMTP Server id 8.3.83.0; Mon, 6 Sep 2010 11:55:58 -0400 Received: from lemmy.osrc.amd.com (lemmy.osrc.amd.com [165.204.15.93]) by gwo.osrc.amd.com (Postfix) with ESMTP id 37A8049C258; Mon, 6 Sep 2010 16:55:58 +0100 (BST) Received: by lemmy.osrc.amd.com (Postfix, from userid 1000) id D6E299FC04; Mon, 6 Sep 2010 17:56:28 +0200 (CEST) From: Joerg Roedel To: Avi Kivity , Marcelo Tosatti CC: Alexander Graf , , , , Joerg Roedel Subject: [PATCH 16/27] KVM: MMU: Introduce init_kvm_nested_mmu() Date: Mon, 6 Sep 2010 17:55:55 +0200 Message-ID: <1283788566-29186-17-git-send-email-joerg.roedel@amd.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1283788566-29186-1-git-send-email-joerg.roedel@amd.com> References: <1283788566-29186-1-git-send-email-joerg.roedel@amd.com> MIME-Version: 1.0 X-Reverse-DNS: unknown Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Mon, 06 Sep 2010 16:02:10 +0000 (UTC) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 38dc82e..a338235 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -805,3 +805,4 @@ void kvm_set_shared_msr(unsigned index, u64 val, u64 mask); bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); #endif /* _ASM_X86_KVM_HOST_H */ + diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index 1f425f3..7bc8d67 100644 --- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c @@ -2784,11 +2784,43 @@ static int init_kvm_softmmu(struct kvm_vcpu *vcpu) return r; } +static int init_kvm_nested_mmu(struct kvm_vcpu *vcpu) +{ + struct kvm_mmu *g_context = &vcpu->arch.nested_mmu; + + g_context->get_cr3 = get_cr3; + g_context->inject_page_fault = kvm_inject_page_fault; + + /* + * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The + * translation of l2_gpa to l1_gpa addresses is done using the + * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa + * functions between mmu and nested_mmu are swapped. + */ + if (!is_paging(vcpu)) { + g_context->root_level = 0; + g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested; + } else if (is_long_mode(vcpu)) { + g_context->root_level = PT64_ROOT_LEVEL; + g_context->gva_to_gpa = paging64_gva_to_gpa_nested; + } else if (is_pae(vcpu)) { + g_context->root_level = PT32E_ROOT_LEVEL; + g_context->gva_to_gpa = paging64_gva_to_gpa_nested; + } else { + g_context->root_level = PT32_ROOT_LEVEL; + g_context->gva_to_gpa = paging32_gva_to_gpa_nested; + } + + return 0; +} + static int init_kvm_mmu(struct kvm_vcpu *vcpu) { vcpu->arch.update_pte.pfn = bad_pfn; - if (tdp_enabled) + if (mmu_is_nested(vcpu)) + return init_kvm_nested_mmu(vcpu); + else if (tdp_enabled) return init_kvm_tdp_mmu(vcpu); else return init_kvm_softmmu(vcpu); diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h index 7086ca8..513abbb 100644 --- a/arch/x86/kvm/mmu.h +++ b/arch/x86/kvm/mmu.h @@ -47,6 +47,7 @@ #define PFERR_USER_MASK (1U << 2) #define PFERR_RSVD_MASK (1U << 3) #define PFERR_FETCH_MASK (1U << 4) +#define PFERR_NESTED_MASK (1U << 31) int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]); int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context); diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 1f5db75..b2fe9e7 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3476,6 +3476,25 @@ static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 *error) return gpa; } +static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 *error) +{ + gpa_t t_gpa; + u32 access; + u32 err; + + BUG_ON(!mmu_is_nested(vcpu)); + + /* NPT walks are treated as user writes */ + access = PFERR_WRITE_MASK | PFERR_USER_MASK; + t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &err); + if (t_gpa == UNMAPPED_GVA) { + vcpu->arch.fault.address = gpa; + vcpu->arch.fault.error_code = err | PFERR_NESTED_MASK; + } + + return t_gpa; +} + gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error) { u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0; @@ -5691,6 +5710,7 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu) vcpu->arch.walk_mmu = &vcpu->arch.mmu; vcpu->arch.mmu.root_hpa = INVALID_PAGE; vcpu->arch.mmu.translate_gpa = translate_gpa; + vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa; if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu)) vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE; else