From patchwork Mon Dec 13 22:43:44 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cam Macdonell X-Patchwork-Id: 407792 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oBDMiJvm008184 for ; Mon, 13 Dec 2010 22:44:20 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753547Ab0LMWoQ (ORCPT ); Mon, 13 Dec 2010 17:44:16 -0500 Received: from smtp.srv.ualberta.ca ([129.128.5.19]:59243 "EHLO mail7.srv.ualberta.ca" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751941Ab0LMWoQ (ORCPT ); Mon, 13 Dec 2010 17:44:16 -0500 Received: from localhost.localdomain (st-brides.cs.ualberta.ca [129.128.23.21]) (authenticated bits=0) by mail7.srv.ualberta.ca (8.14.3/8.13.8) with ESMTP id oBDMhknZ024677 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 13 Dec 2010 15:44:01 -0700 (MST) From: Cam Macdonell To: qemu-devel@nongnu.org Cc: kvm@vger.kernel.org, Cam Macdonell Subject: [PATCH] RFC: delay pci_update_mappings for 64-bit BARs Date: Mon, 13 Dec 2010 15:43:44 -0700 Message-Id: <1292280224-5119-1-git-send-email-cam@cs.ualberta.ca> X-Mailer: git-send-email 1.7.0.4 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Mon, 13 Dec 2010 22:44:20 +0000 (UTC) diff --git a/hw/pci.c b/hw/pci.c index 438c0d1..3b81792 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -1000,6 +1000,9 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) { int i, was_irq_disabled = pci_irq_disabled(d); uint32_t config_size = pci_config_size(d); + int is_64 = 0; + + is_64 = ((val & 0xf) == PCI_BASE_ADDRESS_MEM_TYPE_64); for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) { uint8_t wmask = d->wmask[addr + i]; @@ -1008,7 +1011,7 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) d->config[addr + i] = (d->config[addr + i] & ~wmask) | (val & wmask); d->config[addr + i] &= ~(val & w1cmask); /* W1C: Write 1 to Clear */ } - if (ranges_overlap(addr, l, PCI_BASE_ADDRESS_0, 24) || + if ((ranges_overlap(addr, l, PCI_BASE_ADDRESS_0, 24) && (!is_64)) || ranges_overlap(addr, l, PCI_ROM_ADDRESS, 4) || ranges_overlap(addr, l, PCI_ROM_ADDRESS1, 4) || range_covers_byte(addr, l, PCI_COMMAND))