From patchwork Fri Apr 1 14:10:19 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joerg Roedel X-Patchwork-Id: 681301 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p31EAtRu021219 for ; Fri, 1 Apr 2011 14:10:55 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756905Ab1DAOKs (ORCPT ); Fri, 1 Apr 2011 10:10:48 -0400 Received: from va3ehsobe002.messaging.microsoft.com ([216.32.180.12]:55504 "EHLO VA3EHSOBE002.bigfish.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756879Ab1DAOKo (ORCPT ); Fri, 1 Apr 2011 10:10:44 -0400 Received: from mail108-va3-R.bigfish.com (10.7.14.235) by VA3EHSOBE002.bigfish.com (10.7.40.22) with Microsoft SMTP Server id 14.1.225.8; Fri, 1 Apr 2011 14:10:43 +0000 Received: from mail108-va3 (localhost.localdomain [127.0.0.1]) by mail108-va3-R.bigfish.com (Postfix) with ESMTP id BDC1914A83AD; Fri, 1 Apr 2011 14:10:43 +0000 (UTC) X-SpamScore: -2 X-BigFish: VPS-2(zzbb2cKzz1202hzz8275bhz32i668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: KIP:(null); UIP:(null); IPVD:NLI; H:ausb3twp01.amd.com; RD:none; EFVD:NLI Received: from mail108-va3 (localhost.localdomain [127.0.0.1]) by mail108-va3 (MessageSwitch) id 1301667043452261_4943; Fri, 1 Apr 2011 14:10:43 +0000 (UTC) Received: from VA3EHSMHS001.bigfish.com (unknown [10.7.14.243]) by mail108-va3.bigfish.com (Postfix) with ESMTP id 6040DBD004D; Fri, 1 Apr 2011 14:10:43 +0000 (UTC) Received: from ausb3twp01.amd.com (163.181.249.108) by VA3EHSMHS001.bigfish.com (10.7.99.11) with Microsoft SMTP Server id 14.1.225.8; Fri, 1 Apr 2011 14:10:38 +0000 X-WSS-ID: 0LIZ8PN-01-2NA-02 X-M-MSG: Received: from sausexedgep02.amd.com (sausexedgep02-ext.amd.com [163.181.249.73]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by ausb3twp01.amd.com (Axway MailGate 3.8.1) with ESMTP id 26F8B1028036; Fri, 1 Apr 2011 09:10:35 -0500 (CDT) Received: from sausexhtp02.amd.com (163.181.3.152) by sausexedgep02.amd.com (163.181.36.59) with Microsoft SMTP Server (TLS) id 8.3.106.1; Fri, 1 Apr 2011 09:10:39 -0500 Received: from storexhtp01.amd.com (172.24.4.3) by sausexhtp02.amd.com (163.181.3.152) with Microsoft SMTP Server (TLS) id 8.3.83.0; Fri, 1 Apr 2011 09:10:34 -0500 Received: from gwo.osrc.amd.com (165.204.16.204) by storexhtp01.amd.com (172.24.4.3) with Microsoft SMTP Server id 8.3.83.0; Fri, 1 Apr 2011 10:10:33 -0400 Received: from lemmy.osrc.amd.com (lemmy.osrc.amd.com [165.204.15.93]) by gwo.osrc.amd.com (Postfix) with ESMTP id 6DF3249C5A9; Fri, 1 Apr 2011 15:10:31 +0100 (BST) Received: by lemmy.osrc.amd.com (Postfix, from userid 1000) id 585C61008F7; Fri, 1 Apr 2011 16:10:31 +0200 (CEST) From: Joerg Roedel To: Avi Kivity , Marcelo Tosatti CC: , Joerg Roedel Subject: [PATCH 10/15] KVM: SVM: Add intercept checks for SVM instructions Date: Fri, 1 Apr 2011 16:10:19 +0200 Message-ID: <1301667024-29420-11-git-send-email-joerg.roedel@amd.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1301667024-29420-1-git-send-email-joerg.roedel@amd.com> References: <1301667024-29420-1-git-send-email-joerg.roedel@amd.com> MIME-Version: 1.0 X-OriginatorOrg: amd.com Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 01 Apr 2011 14:10:55 +0000 (UTC) diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index 153f17b..363d7c7 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -75,6 +75,8 @@ #define Stack (1<<13) /* Stack instruction (push/pop) */ #define Group (1<<14) /* Bits 3:5 of modrm byte extend opcode */ #define GroupDual (1<<15) /* Alternate decoding of mod == 3 */ +#define RMExt (1<<16) /* Opcode extension in ModRM r/m if mod == 3 */ + /* Misc flags */ #define Prot (1<<21) /* instruction generates #UD if not in prot-mode */ #define VendorSpecific (1<<22) /* Vendor specific instruction */ @@ -2483,11 +2485,44 @@ static int em_check_perm_dr_write(struct x86_emulate_ctxt *ctxt) return em_check_perm_dr_read(ctxt); } +static int check_efer_svme(struct x86_emulate_ctxt *ctxt) +{ + u64 efer; + + ctxt->ops->get_msr(ctxt->vcpu, MSR_EFER, &efer); + + if (!(efer & EFER_SVME)) + return emulate_ud(ctxt); + + return X86EMUL_CONTINUE; +} + +static int em_check_perm_vmrun_save_load(struct x86_emulate_ctxt *ctxt) +{ + u64 rax = kvm_register_read(ctxt->vcpu, VCPU_REGS_RAX); + + /* Valid physical address? */ + if (rax & 0xffff000000000000) + return emulate_gp(ctxt, 0); + + return check_efer_svme(ctxt); +} + +#define em_check_perm_vmrun em_check_perm_vmrun_save_load +#define em_check_perm_vmload em_check_perm_vmrun_save_load +#define em_check_perm_vmsave em_check_perm_vmrun_save_load +#define em_check_perm_vmmcall check_efer_svme +#define em_check_perm_stgi check_efer_svme +#define em_check_perm_clgi check_efer_svme +#define em_check_perm_skinit check_efer_svme +#define em_check_perm_invlpga check_efer_svme + #define D(_y) { .flags = (_y) } #define DI(_y, _i) { .flags = (_y), .intercept = x86_intercept_##_i } #define DIP(_y, _i) { .flags = (_y), .intercept = x86_intercept_##_i, \ .check_perm = em_check_perm_##_i } #define N D(0) +#define EXT(_f, _e) { .flags = ((_f) | RMExt), .u.group = (_e) } #define G(_f, _g) { .flags = ((_f) | Group), .u.group = (_g) } #define GD(_f, _g) { .flags = ((_f) | Group | GroupDual), .u.gdual = (_g) } #define I(_f, _e) { .flags = (_f), .u.execute = (_e) } @@ -2507,6 +2542,17 @@ static int em_check_perm_dr_write(struct x86_emulate_ctxt *ctxt) D2bv(((_f) & ~Lock) | DstAcc | SrcImm) +static struct opcode group7_rm3[] = { + DIP(SrcNone | ModRM | Prot | Priv, vmrun), + DIP(SrcNone | ModRM | Prot , vmmcall), + DIP(SrcNone | ModRM | Prot | Priv, vmload), + DIP(SrcNone | ModRM | Prot | Priv, vmsave), + DIP(SrcNone | ModRM | Prot | Priv, stgi), + DIP(SrcNone | ModRM | Prot | Priv, clgi), + DIP(SrcNone | ModRM | Prot | Priv, skinit), + DIP(SrcNone | ModRM | Prot | Priv, invlpga), +}; + static struct opcode group1[] = { X7(D(Lock)), N }; @@ -2551,7 +2597,7 @@ static struct group_dual group7 = { { DI(SrcMem | ModRM | ByteOp | Priv | NoAccess, invlpg), }, { D(SrcNone | ModRM | Priv | VendorSpecific), N, - N, D(SrcNone | ModRM | Priv | VendorSpecific), + N, EXT(0, group7_rm3), DI(SrcNone | ModRM | DstMem | Mov, smsw), N, DI(SrcMem16 | ModRM | Mov | Priv, lmsw), N, } }; @@ -2746,6 +2792,7 @@ static struct opcode twobyte_table[256] = { #undef G #undef GD #undef I +#undef EXT #undef D2bv #undef I2bv @@ -2923,6 +2970,12 @@ done_prefixes: opcode = g_mod3[goffset]; else opcode = g_mod012[goffset]; + + if (opcode.flags & RMExt) { + goffset = c->modrm & 7; + opcode = opcode.u.group[goffset]; + } + c->d |= opcode.flags; } diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index ce251c9..b98d00b 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -3892,6 +3892,14 @@ static struct __x86_intercept { [x86_intercept_sidt] = POST_EX(SVM_EXIT_IDTR_READ), [x86_intercept_lgdt] = POST_EX(SVM_EXIT_GDTR_WRITE), [x86_intercept_lidt] = POST_EX(SVM_EXIT_IDTR_WRITE), + [x86_intercept_vmrun] = POST_EX(SVM_EXIT_VMRUN), + [x86_intercept_vmmcall] = POST_EX(SVM_EXIT_VMMCALL), + [x86_intercept_vmload] = POST_EX(SVM_EXIT_VMLOAD), + [x86_intercept_vmsave] = POST_EX(SVM_EXIT_VMSAVE), + [x86_intercept_stgi] = POST_EX(SVM_EXIT_STGI), + [x86_intercept_clgi] = POST_EX(SVM_EXIT_CLGI), + [x86_intercept_skinit] = POST_EX(SVM_EXIT_SKINIT), + [x86_intercept_invlpga] = POST_EX(SVM_EXIT_INVLPGA), }; #undef POST_EX