From patchwork Mon Apr 4 10:39:26 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joerg Roedel X-Patchwork-Id: 684951 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p34AeRhL020799 for ; Mon, 4 Apr 2011 10:40:27 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754446Ab1DDKjw (ORCPT ); Mon, 4 Apr 2011 06:39:52 -0400 Received: from tx2ehsobe003.messaging.microsoft.com ([65.55.88.13]:51766 "EHLO TX2EHSOBE005.bigfish.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754310Ab1DDKjt (ORCPT ); Mon, 4 Apr 2011 06:39:49 -0400 Received: from mail137-tx2-R.bigfish.com (10.9.14.252) by TX2EHSOBE005.bigfish.com (10.9.40.25) with Microsoft SMTP Server id 14.1.225.8; Mon, 4 Apr 2011 10:39:49 +0000 Received: from mail137-tx2 (localhost.localdomain [127.0.0.1]) by mail137-tx2-R.bigfish.com (Postfix) with ESMTP id EF4A01C900C0; Mon, 4 Apr 2011 10:39:48 +0000 (UTC) X-SpamScore: -2 X-BigFish: VPS-2(zzbb2cKzz1202hzz8275bhz32i668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: KIP:(null); UIP:(null); IPVD:NLI; H:ausb3twp02.amd.com; RD:none; EFVD:NLI Received: from mail137-tx2 (localhost.localdomain [127.0.0.1]) by mail137-tx2 (MessageSwitch) id 1301913587740411_23979; Mon, 4 Apr 2011 10:39:47 +0000 (UTC) Received: from TX2EHSMHS039.bigfish.com (unknown [10.9.14.251]) by mail137-tx2.bigfish.com (Postfix) with ESMTP id A745E1158049; Mon, 4 Apr 2011 10:39:47 +0000 (UTC) Received: from ausb3twp02.amd.com (163.181.249.109) by TX2EHSMHS039.bigfish.com (10.9.99.139) with Microsoft SMTP Server id 14.1.225.8; Mon, 4 Apr 2011 10:39:46 +0000 X-WSS-ID: 0LJ4IY6-02-66O-02 X-M-MSG: Received: from sausexedgep02.amd.com (sausexedgep02-ext.amd.com [163.181.249.73]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by ausb3twp02.amd.com (Axway MailGate 3.8.1) with ESMTP id 21BEFC8104; Mon, 4 Apr 2011 05:39:42 -0500 (CDT) Received: from sausexhtp01.amd.com (163.181.3.165) by sausexedgep02.amd.com (163.181.36.59) with Microsoft SMTP Server (TLS) id 8.3.106.1; Mon, 4 Apr 2011 05:39:56 -0500 Received: from storexhtp01.amd.com (172.24.4.3) by sausexhtp01.amd.com (163.181.3.165) with Microsoft SMTP Server (TLS) id 8.3.83.0; Mon, 4 Apr 2011 05:39:44 -0500 Received: from gwo.osrc.amd.com (165.204.16.204) by storexhtp01.amd.com (172.24.4.3) with Microsoft SMTP Server id 8.3.83.0; Mon, 4 Apr 2011 06:39:43 -0400 Received: from lemmy.osrc.amd.com (lemmy.osrc.amd.com [165.204.15.93]) by gwo.osrc.amd.com (Postfix) with ESMTP id CA50249C5A1; Mon, 4 Apr 2011 11:39:40 +0100 (BST) Received: by lemmy.osrc.amd.com (Postfix, from userid 1000) id BFFA0FFD28; Mon, 4 Apr 2011 12:39:40 +0200 (CEST) From: Joerg Roedel To: Avi Kivity , Marcelo Tosatti CC: , Joerg Roedel Subject: [PATCH 05/15] KVM: x86 emulator: Add flag to check for protected mode instructions Date: Mon, 4 Apr 2011 12:39:26 +0200 Message-ID: <1301913576-10360-6-git-send-email-joerg.roedel@amd.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1301913576-10360-1-git-send-email-joerg.roedel@amd.com> References: <1301913576-10360-1-git-send-email-joerg.roedel@amd.com> MIME-Version: 1.0 X-OriginatorOrg: amd.com Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 04 Apr 2011 10:40:28 +0000 (UTC) This patch adds a flag for the opcoded to tag instruction which are only recognized in protected mode. The necessary check is added too. Signed-off-by: Joerg Roedel --- arch/x86/include/asm/kvm_emulate.h | 4 ++++ arch/x86/kvm/emulate.c | 7 +++++++ 2 files changed, 11 insertions(+), 0 deletions(-) diff --git a/arch/x86/include/asm/kvm_emulate.h b/arch/x86/include/asm/kvm_emulate.h index a891051..dfca25b 100644 --- a/arch/x86/include/asm/kvm_emulate.h +++ b/arch/x86/include/asm/kvm_emulate.h @@ -268,6 +268,10 @@ struct x86_emulate_ctxt { #define X86EMUL_MODE_PROT32 4 /* 32-bit protected mode. */ #define X86EMUL_MODE_PROT64 8 /* 64-bit (long) mode. */ +/* any protected mode */ +#define X86EMUL_MODE_PROT (X86EMUL_MODE_PROT16|X86EMUL_MODE_PROT32| \ + X86EMUL_MODE_PROT64) + enum x86_intercept_stage { X86_ICPT_PRE_EXCEPT, X86_ICPT_POST_EXCEPT, diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index b002845..686fa0b 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -76,6 +76,7 @@ #define Group (1<<14) /* Bits 3:5 of modrm byte extend opcode */ #define GroupDual (1<<15) /* Alternate decoding of mod == 3 */ /* Misc flags */ +#define Prot (1<<21) /* instruction generates #UD if not in prot-mode */ #define VendorSpecific (1<<22) /* Vendor specific instruction */ #define NoAccess (1<<23) /* Don't access memory (lea/invlpg/verr etc) */ #define Op3264 (1<<24) /* Operand is 64b in long mode, 32b otherwise */ @@ -3008,6 +3009,12 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt) goto done; } + /* Instruction can only be executed in protected mode */ + if ((c->d & Prot) && !(ctxt->mode & X86EMUL_MODE_PROT)) { + rc = emulate_ud(ctxt); + goto done; + } + /* Do instruction specific permission checks */ if (c->check_perm) { rc = c->check_perm(ctxt);