From patchwork Thu Jul 7 14:13:12 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joerg Roedel X-Patchwork-Id: 952982 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p67EDfE1021501 for ; Thu, 7 Jul 2011 14:13:42 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756617Ab1GGONh (ORCPT ); Thu, 7 Jul 2011 10:13:37 -0400 Received: from ch1ehsobe005.messaging.microsoft.com ([216.32.181.185]:26563 "EHLO CH1EHSOBE002.bigfish.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1756590Ab1GGONd (ORCPT ); Thu, 7 Jul 2011 10:13:33 -0400 Received: from mail214-ch1-R.bigfish.com (216.32.181.174) by CH1EHSOBE002.bigfish.com (10.43.70.52) with Microsoft SMTP Server id 14.1.225.22; Thu, 7 Jul 2011 14:13:32 +0000 Received: from mail214-ch1 (localhost.localdomain [127.0.0.1]) by mail214-ch1-R.bigfish.com (Postfix) with ESMTP id 145F114802EB; Thu, 7 Jul 2011 14:13:32 +0000 (UTC) X-SpamScore: 1 X-BigFish: VPS1(zzzz1202hzz8275bhz32i668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:163.181.249.109; KIP:(null); UIP:(null); IPVD:NLI; H:ausb3twp02.amd.com; RD:none; EFVD:NLI Received: from mail214-ch1 (localhost.localdomain [127.0.0.1]) by mail214-ch1 (MessageSwitch) id 1310048011906741_19268; Thu, 7 Jul 2011 14:13:31 +0000 (UTC) Received: from CH1EHSMHS024.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.246]) by mail214-ch1.bigfish.com (Postfix) with ESMTP id D10FC1508055; Thu, 7 Jul 2011 14:13:31 +0000 (UTC) Received: from ausb3twp02.amd.com (163.181.249.109) by CH1EHSMHS024.bigfish.com (10.43.70.24) with Microsoft SMTP Server id 14.1.225.22; Thu, 7 Jul 2011 14:13:29 +0000 X-WSS-ID: 0LNYVID-02-FWA-02 X-M-MSG: Received: from sausexedgep01.amd.com (sausexedgep01-ext.amd.com [163.181.249.72]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by ausb3twp02.amd.com (Axway MailGate 3.8.1) with ESMTP id 21827C8118; Thu, 7 Jul 2011 09:13:25 -0500 (CDT) Received: from SAUSEXDAG01.amd.com (163.181.3.36) by sausexedgep01.amd.com (163.181.36.54) with Microsoft SMTP Server (TLS) id 8.3.106.1; Thu, 7 Jul 2011 09:14:05 -0500 Received: from storexhtp02.amd.com (172.24.4.4) by sausexdag01.amd.com (163.181.3.36) with Microsoft SMTP Server (TLS) id 14.1.289.1; Thu, 7 Jul 2011 09:13:28 -0500 Received: from gwo.osrc.amd.com (165.204.16.204) by storexhtp02.amd.com (172.24.4.4) with Microsoft SMTP Server id 8.3.83.0; Thu, 7 Jul 2011 10:13:17 -0400 Received: from lemmy.osrc.amd.com (lemmy.osrc.amd.com [165.204.15.93]) by gwo.osrc.amd.com (Postfix) with ESMTP id 7CDEC49C5E9; Thu, 7 Jul 2011 15:13:16 +0100 (BST) Received: by lemmy.osrc.amd.com (Postfix, from userid 1000) id 571B5FFDC5; Thu, 7 Jul 2011 16:13:16 +0200 (CEST) From: Joerg Roedel To: Avi Kivity , Marcelo Tosatti CC: , , Joerg Roedel Subject: [PATCH 2/3] qemu-x86: Add tsc_freq option to -cpu Date: Thu, 7 Jul 2011 16:13:12 +0200 Message-ID: <1310047993-7649-3-git-send-email-joerg.roedel@amd.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1310047993-7649-1-git-send-email-joerg.roedel@amd.com> References: <1310047993-7649-1-git-send-email-joerg.roedel@amd.com> MIME-Version: 1.0 X-OriginatorOrg: amd.com Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Thu, 07 Jul 2011 14:13:42 +0000 (UTC) To let the user configure the desired tsc frequency for the guest if running in KVM. Signed-off-by: Joerg Roedel --- target-i386/cpu.h | 1 + target-i386/cpuid.c | 13 +++++++++++++ 2 files changed, 14 insertions(+), 0 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index cdf68ff..399e124 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -743,6 +743,7 @@ typedef struct CPUX86State { uint32_t cpuid_kvm_features; uint32_t cpuid_svm_features; bool tsc_valid; + int tsc_khz; /* in order to simplify APIC support, we leave this pointer to the user */ diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c index e1ae3af..89e9623 100644 --- a/target-i386/cpuid.c +++ b/target-i386/cpuid.c @@ -224,6 +224,7 @@ typedef struct x86_def_t { int family; int model; int stepping; + int tsc_khz; uint32_t features, ext_features, ext2_features, ext3_features; uint32_t kvm_features, svm_features; uint32_t xlevel; @@ -704,6 +705,17 @@ static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model) } else if (!strcmp(featurestr, "model_id")) { pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id), val); + } else if (!strcmp(featurestr, "tsc_freq")) { + int64_t tsc_freq; + char *err; + + tsc_freq = strtosz_suffix_unit(val, &err, + STRTOSZ_DEFSUFFIX_B, 1000); + if (!*val || *err) { + fprintf(stderr, "bad numerical value %s\n", val); + goto error; + } + x86_cpu_def->tsc_khz = tsc_freq / 1000; } else { fprintf(stderr, "unrecognized feature %s\n", featurestr); goto error; @@ -872,6 +884,7 @@ int cpu_x86_register (CPUX86State *env, const char *cpu_model) env->cpuid_svm_features = def->svm_features; env->cpuid_ext4_features = def->ext4_features; env->cpuid_xlevel2 = def->xlevel2; + env->tsc_khz = def->tsc_khz; if (!kvm_enabled()) { env->cpuid_features &= TCG_FEATURES; env->cpuid_ext_features &= TCG_EXT_FEATURES;