Message ID | 1349972009-23027-10-git-send-email-mihai.caraman@freescale.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On 11.10.2012, at 18:13, Mihai Caraman wrote: > When delivering guest IRQs, update MSR computation mode according to guest > interrupt computation mode found in EPCR. > > Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com> > --- > v1: added intermediate msr variable. > > arch/powerpc/kvm/booke.c | 9 ++++++++- > 1 files changed, 8 insertions(+), 1 deletions(-) > > diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c > index 7c9c389..86f0d0d 100644 > --- a/arch/powerpc/kvm/booke.c > +++ b/arch/powerpc/kvm/booke.c > @@ -312,6 +312,7 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, > bool crit; > bool keep_irq = false; > enum int_class int_class; > + ulong new_msr = vcpu->arch.shared->msr; > > /* Truncate crit indicators in 32 bit mode */ > if (!(vcpu->arch.shared->msr & MSR_SF)) { > @@ -407,7 +408,13 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, > set_guest_esr(vcpu, vcpu->arch.queued_esr); > if (update_dear == true) > set_guest_dear(vcpu, vcpu->arch.queued_dear); > - kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask); > + > + new_msr &= msr_mask; > +#if defined(CONFIG_64BIT) && defined(CONFIG_KVM_BOOKE_HV) Why the dependency on booke_hv? This is booke code and according to booke, ICM declares the interrupt mode a guest will be in, right? I'll just remove the BOOKE_HV ifdef bit. Alex -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c index 7c9c389..86f0d0d 100644 --- a/arch/powerpc/kvm/booke.c +++ b/arch/powerpc/kvm/booke.c @@ -312,6 +312,7 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, bool crit; bool keep_irq = false; enum int_class int_class; + ulong new_msr = vcpu->arch.shared->msr; /* Truncate crit indicators in 32 bit mode */ if (!(vcpu->arch.shared->msr & MSR_SF)) { @@ -407,7 +408,13 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, set_guest_esr(vcpu, vcpu->arch.queued_esr); if (update_dear == true) set_guest_dear(vcpu, vcpu->arch.queued_dear); - kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask); + + new_msr &= msr_mask; +#if defined(CONFIG_64BIT) && defined(CONFIG_KVM_BOOKE_HV) + if (vcpu->arch.epcr & SPRN_EPCR_ICM) + new_msr |= MSR_CM; +#endif + kvmppc_set_msr(vcpu, new_msr); if (!keep_irq) clear_bit(priority, &vcpu->arch.pending_exceptions);
When delivering guest IRQs, update MSR computation mode according to guest interrupt computation mode found in EPCR. Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com> --- v1: added intermediate msr variable. arch/powerpc/kvm/booke.c | 9 ++++++++- 1 files changed, 8 insertions(+), 1 deletions(-)