From patchwork Wed Oct 31 01:00:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 1675291 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 7E2CDDFB7B for ; Wed, 31 Oct 2012 01:01:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934908Ab2JaBBZ (ORCPT ); Tue, 30 Oct 2012 21:01:25 -0400 Received: from cantor2.suse.de ([195.135.220.15]:52478 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932291Ab2JaBBE (ORCPT ); Tue, 30 Oct 2012 21:01:04 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 3C243A3DDE; Wed, 31 Oct 2012 02:01:03 +0100 (CET) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: qemu-devel@nongnu.org Cc: anthony@codemonkey.ws, =?UTF-8?q?Andreas=20F=C3=A4rber?= , Luiz Capitulino (supporter:Monitor (QMP/HMP)), Markus Armbruster (supporter:Monitor (QMP/HMP)), Avi Kivity (supporter:X86), Marcelo Tosatti (supporter:X86), kvm@vger.kernel.org (open list:X86) Subject: [PATCH 31/35] target-i386: Pass X86CPU to cpu_x86_inject_mce() Date: Wed, 31 Oct 2012 02:00:02 +0100 Message-Id: <1351645206-3041-32-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1351645206-3041-1-git-send-email-afaerber@suse.de> References: <1351645206-3041-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Needed for changing run_on_cpu() argument to CPUState. Signed-off-by: Andreas Färber --- monitor.c | 6 ++++-- target-i386/cpu.h | 2 +- target-i386/helper.c | 3 ++- target-i386/kvm.c | 2 +- 4 Dateien geändert, 8 Zeilen hinzugefügt(+), 5 Zeilen entfernt(-) diff --git a/monitor.c b/monitor.c index eeef32e..c0e32d6 100644 --- a/monitor.c +++ b/monitor.c @@ -1988,7 +1988,8 @@ static void do_acl_remove(Monitor *mon, const QDict *qdict) #if defined(TARGET_I386) static void do_inject_mce(Monitor *mon, const QDict *qdict) { - CPUArchState *cenv; + X86CPU *cpu; + CPUX86State *cenv; int cpu_index = qdict_get_int(qdict, "cpu_index"); int bank = qdict_get_int(qdict, "bank"); uint64_t status = qdict_get_int(qdict, "status"); @@ -2001,8 +2002,9 @@ static void do_inject_mce(Monitor *mon, const QDict *qdict) flags |= MCE_INJECT_BROADCAST; } for (cenv = first_cpu; cenv != NULL; cenv = cenv->next_cpu) { + cpu = x86_env_get_cpu(cenv); if (cenv->cpu_index == cpu_index) { - cpu_x86_inject_mce(mon, cenv, bank, status, mcg_status, addr, misc, + cpu_x86_inject_mce(mon, cpu, bank, status, mcg_status, addr, misc, flags); break; } diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 2d7b4c3..cdc59dc 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -1135,7 +1135,7 @@ void do_cpu_sipi(X86CPU *cpu); #define MCE_INJECT_BROADCAST 1 #define MCE_INJECT_UNCOND_AO 2 -void cpu_x86_inject_mce(Monitor *mon, CPUX86State *cenv, int bank, +void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank, uint64_t status, uint64_t mcg_status, uint64_t addr, uint64_t misc, int flags); diff --git a/target-i386/helper.c b/target-i386/helper.c index 0424ccf..45f4bed 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -1141,10 +1141,11 @@ static void do_inject_x86_mce(void *data) } } -void cpu_x86_inject_mce(Monitor *mon, CPUX86State *cenv, int bank, +void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank, uint64_t status, uint64_t mcg_status, uint64_t addr, uint64_t misc, int flags) { + CPUX86State *cenv = &cpu->env; MCEInjectionParams params = { .mon = mon, .env = cenv, diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 5bf2f89c..64b837b 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -243,7 +243,7 @@ static void kvm_mce_inject(X86CPU *cpu, hwaddr paddr, int code) status |= 0xc0; mcg_status |= MCG_STATUS_RIPV; } - cpu_x86_inject_mce(NULL, env, 9, status, mcg_status, paddr, + cpu_x86_inject_mce(NULL, cpu, 9, status, mcg_status, paddr, (MCM_ADDR_PHYS << 6) | 0xc, cpu_x86_support_mca_broadcast(env) ? MCE_INJECT_BROADCAST : 0);