From patchwork Thu Nov 22 02:34:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sanjay Lal X-Patchwork-Id: 1789121 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 5B0D73FCAE for ; Thu, 22 Nov 2012 21:13:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755715Ab2KVVNk (ORCPT ); Thu, 22 Nov 2012 16:13:40 -0500 Received: from kymasys.com ([64.62.140.43]:56620 "HELO kymasys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1755531Ab2KVSqL (ORCPT ); Thu, 22 Nov 2012 13:46:11 -0500 Received: from agni.kymasys.com ([75.40.23.192]) by kymasys.com for ; Wed, 21 Nov 2012 18:34:43 -0800 Received: by agni.kymasys.com (Postfix, from userid 500) id AE369630282; Wed, 21 Nov 2012 18:34:18 -0800 (PST) From: Sanjay Lal To: kvm@vger.kernel.org, linux-mips@linux-mips.org Cc: Sanjay Lal Subject: [PATCH v2 13/18] MIPS: If KVM is enabled then use the KVM specific routine to flush the TLBs on a ASID wrap. Date: Wed, 21 Nov 2012 18:34:11 -0800 Message-Id: <1353551656-23579-14-git-send-email-sanjayl@kymasys.com> X-Mailer: git-send-email 1.7.11.3 In-Reply-To: <1353551656-23579-1-git-send-email-sanjayl@kymasys.com> References: <1353551656-23579-1-git-send-email-sanjayl@kymasys.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Signed-off-by: Sanjay Lal --- arch/mips/include/asm/mmu_context.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h index 9b02cfb..10a3fd2 100644 --- a/arch/mips/include/asm/mmu_context.h +++ b/arch/mips/include/asm/mmu_context.h @@ -112,15 +112,21 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) static inline void get_new_mmu_context(struct mm_struct *mm, unsigned long cpu) { + extern void kvm_local_flush_tlb_all(void); unsigned long asid = asid_cache(cpu); if (! ((asid += ASID_INC) & ASID_MASK) ) { if (cpu_has_vtag_icache) flush_icache_all(); +#ifdef CONFIG_VIRTUALIZATION + kvm_local_flush_tlb_all(); /* start new asid cycle */ +#else local_flush_tlb_all(); /* start new asid cycle */ +#endif if (!asid) /* fix version if needed */ asid = ASID_FIRST_VERSION; } + cpu_context(cpu, mm) = asid_cache(cpu) = asid; }