From patchwork Thu Dec 13 07:29:39 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Yang Z" X-Patchwork-Id: 1871431 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 721DB3FC64 for ; Thu, 13 Dec 2012 07:34:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752927Ab2LMHeK (ORCPT ); Thu, 13 Dec 2012 02:34:10 -0500 Received: from mga03.intel.com ([143.182.124.21]:26579 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751626Ab2LMHeJ (ORCPT ); Thu, 13 Dec 2012 02:34:09 -0500 Received: from azsmga002.ch.intel.com ([10.2.17.35]) by azsmga101.ch.intel.com with ESMTP; 12 Dec 2012 23:34:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.84,272,1355126400"; d="scan'208";a="180303011" Received: from yang-desktop.sh.intel.com ([10.239.13.107]) by AZSMGA002.ch.intel.com with ESMTP; 12 Dec 2012 23:34:07 -0800 From: Yang Zhang To: kvm@vger.kernel.org Cc: gleb@redhat.com, haitao.shan@intel.com, xiantao.zhang@intel.com, jun.nakajima@intel.com, h.peter.anvin@intel.com, Yang Zhang Subject: [PATCH 1/2] x86: Enable ack interrupt on vmexit Date: Thu, 13 Dec 2012 15:29:39 +0800 Message-Id: <1355383780-1367-2-git-send-email-yang.z.zhang@intel.com> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1355383780-1367-1-git-send-email-yang.z.zhang@intel.com> References: <1355383780-1367-1-git-send-email-yang.z.zhang@intel.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Yang Zhang Ack interrupt on vmexit is required by Posted Interrupt. With it, when external interrupt caused vmexit, the cpu will acknowledge the interrupt controller and save the interrupt's vector in vmcs. Only enable it when posted interrupt is enabled. There are several approaches to enable it. This patch uses a simply way: re-generate an interrupt via self ipi. Signed-off-by: Yang Zhang --- arch/x86/kvm/vmx.c | 20 +++++++++++++++++--- 1 files changed, 17 insertions(+), 3 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 8cd9eb7..6b6bd03 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -2549,7 +2549,7 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf) #ifdef CONFIG_X86_64 min |= VM_EXIT_HOST_ADDR_SPACE_SIZE; #endif - opt = VM_EXIT_SAVE_IA32_PAT | VM_EXIT_LOAD_IA32_PAT; + opt = VM_EXIT_SAVE_IA32_PAT | VM_EXIT_LOAD_IA32_PAT | VM_EXIT_ACK_INTR_ON_EXIT; if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS, &_vmexit_control) < 0) return -EIO; @@ -3913,6 +3913,7 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx) unsigned long a; #endif int i; + u32 vmexit_ctrl = vmcs_config.vmexit_ctrl; /* I/O */ vmcs_write64(IO_BITMAP_A, __pa(vmx_io_bitmap_a)); @@ -3996,8 +3997,10 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx) vmx->guest_msrs[j].mask = -1ull; ++vmx->nmsrs; } - - vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl); + + if(!enable_apicv_pi) + vmexit_ctrl &= ~VM_EXIT_ACK_INTR_ON_EXIT; + vmcs_write32(VM_EXIT_CONTROLS, vmexit_ctrl); /* 22.2.1, 20.8.1 */ vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl); @@ -6267,6 +6270,17 @@ static void vmx_complete_atomic_exit(struct vcpu_vmx *vmx) asm("int $2"); kvm_after_handle_nmi(&vmx->vcpu); } + if ((exit_intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_EXT_INTR && + (exit_intr_info & INTR_INFO_VALID_MASK) && enable_apicv_pi) { + unsigned int vector, tmr; + + vector = exit_intr_info & INTR_INFO_VECTOR_MASK; + tmr = apic_read(APIC_TMR + ((vector & ~0x1f) >> 1)); + apic_eoi(); + if ( !((1 << (vector % 32)) & tmr) ) + apic->send_IPI_self(vector); + } + } static void vmx_recover_nmi_blocking(struct vcpu_vmx *vmx)