From patchwork Sun May 19 05:47:36 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sanjay Lal X-Patchwork-Id: 2589921 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id AABD73FDBC for ; Sun, 19 May 2013 05:49:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752124Ab3ESFtN (ORCPT ); Sun, 19 May 2013 01:49:13 -0400 Received: from kymasys.com ([64.62.140.43]:44250 "HELO kymasys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1750978Ab3ESFtM (ORCPT ); Sun, 19 May 2013 01:49:12 -0400 Received: from agni.kymasys.com ([75.40.23.192]) by kymasys.com for ; Sat, 18 May 2013 22:49:11 -0700 Received: by agni.kymasys.com (Postfix, from userid 500) id 51A37630066; Sat, 18 May 2013 22:47:43 -0700 (PDT) From: Sanjay Lal To: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org, Ralf Baechle , Gleb Natapov , Marcelo Tosatti , Sanjay Lal Subject: [PATCH 14/18] KVM/MIPS32-VZ: Guest exception batching support. Date: Sat, 18 May 2013 22:47:36 -0700 Message-Id: <1368942460-15577-15-git-send-email-sanjayl@kymasys.com> X-Mailer: git-send-email 1.7.11.3 In-Reply-To: <1368942460-15577-1-git-send-email-sanjayl@kymasys.com> References: <1368942460-15577-1-git-send-email-sanjayl@kymasys.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org - In Trap & Emulate the hypervisor maintains exception priority in order to comply with the priorities defined by the architecture. - In VZ mode, we just set all the pending exception bits, and let the processor deliver them to the guest in the expected priority order. Signed-off-by: Sanjay Lal --- arch/mips/kvm/kvm_mips_int.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/mips/kvm/kvm_mips_int.h b/arch/mips/kvm/kvm_mips_int.h index 20da7d2..7eac28e 100644 --- a/arch/mips/kvm/kvm_mips_int.h +++ b/arch/mips/kvm/kvm_mips_int.h @@ -29,8 +29,13 @@ #define C_TI (_ULCAST_(1) << 30) +#ifdef CONFIG_KVM_MIPS_VZ +#define KVM_MIPS_IRQ_DELIVER_ALL_AT_ONCE (1) +#define KVM_MIPS_IRQ_CLEAR_ALL_AT_ONCE (1) +#else #define KVM_MIPS_IRQ_DELIVER_ALL_AT_ONCE (0) #define KVM_MIPS_IRQ_CLEAR_ALL_AT_ONCE (0) +#endif void kvm_mips_queue_irq(struct kvm_vcpu *vcpu, uint32_t priority); void kvm_mips_dequeue_irq(struct kvm_vcpu *vcpu, uint32_t priority);