[qom-cpu,18/59] cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks

Message ID	1370805206-26574-19-git-send-email-afaerber@suse.de (mailing list archive)
State	New, archived
Headers	show Return-Path: <kvm-owner@vger.kernel.org> X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 66501E0172 for <patchwork-kvm@patchwork.kernel.org>; Sun, 9 Jun 2013 19:14:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752084Ab3FITOR (ORCPT <rfc822;patchwork-kvm@patchwork.kernel.org>); Sun, 9 Jun 2013 15:14:17 -0400 Received: from cantor2.suse.de ([195.135.220.15]:44380 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752038Ab3FITOJ (ORCPT <rfc822;kvm@vger.kernel.org>); Sun, 9 Jun 2013 15:14:09 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 04101A50DD; Sun, 9 Jun 2013 21:14:05 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de> To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>, Blue Swirl <blauwirbel@gmail.com>, Gleb Natapov <gleb@redhat.com>, Marcelo Tosatti <mtosatti@redhat.com>, Riku Voipio <riku.voipio@iki.fi>, Luiz Capitulino <lcapitulino@redhat.com>, Markus Armbruster <armbru@redhat.com>, Richard Henderson <rth@twiddle.net>, Paul Brook <paul@codesourcery.com>, Peter Maydell <peter.maydell@linaro.org>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Michael Walle <michael@walle.cc>, Aurelien Jarno <aurelien@aurel32.net>, Anthony Green <green@moxielogic.com>, Alexander Graf <agraf@suse.de>, Guan Xuetao <gxt@mprc.pku.edu.cn>, Max Filippov <jcmvbkbc@gmail.com>, kvm@vger.kernel.org (open list:Overall), qemu-ppc@nongnu.org (open list:PowerPC) Subject: [PATCH qom-cpu 18/59] cpu: Turn cpu_dump_{state, statistics}() into CPUState hooks Date: Sun, 9 Jun 2013 21:12:45 +0200 Message-Id: <1370805206-26574-19-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1370805206-26574-1-git-send-email-afaerber@suse.de> References: <1370805206-26574-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: <kvm.vger.kernel.org> X-Mailing-List: kvm@vger.kernel.org

diff --git a/bsd-user/main.c b/bsd-user/main.c index 0da3ab9..b13803e 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -511,6 +511,7 @@ static void flush_windows(CPUSPARCState *env) void cpu_loop(CPUSPARCState *env) { + CPUState *cs = CPU(sparc_env_get_cpu(env)); int trapnr, ret, syscall_nr; //target_siginfo_t info; @@ -659,7 +660,7 @@ void cpu_loop(CPUSPARCState *env) badtrap: #endif printf ("Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); exit (1); } process_pending_signals (env); diff --git a/cpus.c b/cpus.c index 080f308..636d4d8 100644 --- a/cpus.c +++ b/cpus.c @@ -388,7 +388,7 @@ void configure_icount(const char *option) static void hw_one_error(CPUState *cpu, void *data) { fprintf(stderr, "CPU #%d:\n", cpu->cpu_index); - cpu_dump_state(cpu->env_ptr, stderr, fprintf, CPU_DUMP_FPU); + cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU); } void hw_error(const char *fmt, ...) diff --git a/exec.c b/exec.c index c0fa5a3..2b99bb9 100644 --- a/exec.c +++ b/exec.c @@ -517,6 +517,7 @@ void cpu_single_step(CPUArchState *env, int enabled) void cpu_abort(CPUArchState *env, const char *fmt, ...) { + CPUState *cpu = ENV_GET_CPU(env); va_list ap; va_list ap2; @@ -525,7 +526,7 @@ void cpu_abort(CPUArchState *env, const char *fmt, ...) fprintf(stderr, "qemu: fatal: "); vfprintf(stderr, fmt, ap); fprintf(stderr, "\n"); - cpu_dump_state(env, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP); + cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP); if (qemu_log_enabled()) { qemu_log("qemu: fatal: "); qemu_log_vprintf(fmt, ap2); diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index f0a5931..e19acf2 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -354,16 +354,6 @@ int page_check_range(target_ulong start, target_ulong len, int flags); CPUArchState *cpu_copy(CPUArchState *env); -#define CPU_DUMP_CODE 0x00010000 -#define CPU_DUMP_FPU 0x00020000 /* dump FPU register state, not just integer */ -/* dump info about TCG QEMU's condition code optimization state */ -#define CPU_DUMP_CCOP 0x00040000 - -void cpu_dump_state(CPUArchState *env, FILE *f, fprintf_function cpu_fprintf, - int flags); -void cpu_dump_statistics(CPUArchState *env, FILE *f, fprintf_function cpu_fprintf, - int flags); - void QEMU_NORETURN cpu_abort(CPUArchState *env, const char *fmt, ...) GCC_FMT_ATTR(2, 3); extern CPUArchState *first_cpu; diff --git a/include/qemu/log.h b/include/qemu/log.h index 6b0db02..957684e 100644 --- a/include/qemu/log.h +++ b/include/qemu/log.h @@ -72,7 +72,7 @@ void GCC_FMT_ATTR(2, 3) qemu_log_mask(int mask, const char *fmt, ...); static inline void log_cpu_state(CPUArchState *env1, int flags) { if (qemu_log_enabled()) { - cpu_dump_state(env1, qemu_logfile, fprintf, flags); + cpu_dump_state(ENV_GET_CPU(env1), qemu_logfile, fprintf, flags); } } diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 4969e2a..1273dc0 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -48,6 +48,8 @@ typedef struct CPUState CPUState; * instantiatable CPU type. * @reset: Callback to reset the #CPUState to its initial state. * @do_interrupt: Callback for interrupt handling. + * @dump_state: Callback for dumping state. + * @dump_statistics: Callback for dumping statistics. * @get_arch_id: Callback for getting architecture-dependent CPU ID. * @get_paging_enabled: Callback for inquiring whether paging is enabled. * @get_memory_mapping: Callback for obtaining the memory mappings. @@ -64,6 +66,10 @@ typedef struct CPUClass { void (*reset)(CPUState *cpu); void (*do_interrupt)(CPUState *cpu); + void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, + int flags); + void (*dump_statistics)(CPUState *cpu, FILE *f, + fprintf_function cpu_fprintf, int flags); int64_t (*get_arch_id)(CPUState *cpu); bool (*get_paging_enabled)(const CPUState *cpu); void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, @@ -202,6 +208,42 @@ int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, void *opaque); /** + * CPUDumpFlags: + * @CPU_DUMP_CODE: + * @CPU_DUMP_FPU: dump FPU register state, not just integer + * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state + */ +enum CPUDumpFlags { + CPU_DUMP_CODE = 0x00010000, + CPU_DUMP_FPU = 0x00020000, + CPU_DUMP_CCOP = 0x00040000, +}; + +/** + * cpu_dump_state: + * @cpu: The CPU whose state is to be dumped. + * @f: File to dump to. + * @cpu_fprintf: Function to dump with. + * @flags: Flags what to dump. + * + * Dumps CPU state. + */ +void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, + int flags); + +/** + * cpu_dump_statistics: + * @cpu: The CPU whose state is to be dumped. + * @f: File to dump to. + * @cpu_fprintf: Function to dump with. + * @flags: Flags what to dump. + * + * Dumps CPU statistics. + */ +void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, + int flags); + +/** * cpu_reset: * @cpu: The CPU whose state is to be reset. */ diff --git a/kvm-all.c b/kvm-all.c index 88297b1..1cd4573 100644 --- a/kvm-all.c +++ b/kvm-all.c @@ -1539,7 +1539,7 @@ static int kvm_handle_internal_error(CPUArchState *env, struct kvm_run *run) if (run->internal.suberror == KVM_INTERNAL_ERROR_EMULATION) { fprintf(stderr, "emulation failure\n"); if (!kvm_arch_stop_on_emulation_error(cpu)) { - cpu_dump_state(env, stderr, fprintf, CPU_DUMP_CODE); + cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_CODE); return EXCP_INTERRUPT; } } @@ -1695,7 +1695,7 @@ int kvm_cpu_exec(CPUArchState *env) } while (ret == 0); if (ret < 0) { - cpu_dump_state(env, stderr, fprintf, CPU_DUMP_CODE); + cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_CODE); vm_stop(RUN_STATE_INTERNAL_ERROR); } diff --git a/linux-user/main.c b/linux-user/main.c index 30e7953..95e17cf 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -901,7 +901,7 @@ void cpu_loop(CPUARMState *env) error: fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); abort(); } process_pending_signals(env); @@ -985,7 +985,7 @@ void cpu_loop(CPUUniCore32State *env) error: fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); abort(); } #endif @@ -1115,6 +1115,7 @@ static void flush_windows(CPUSPARCState *env) void cpu_loop (CPUSPARCState *env) { + CPUState *cs = CPU(sparc_env_get_cpu(env)); int trapnr; abi_long ret; target_siginfo_t info; @@ -1246,7 +1247,7 @@ void cpu_loop (CPUSPARCState *env) break; default: printf ("Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); exit (1); } process_pending_signals (env); @@ -1304,7 +1305,7 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val) #define EXCP_DUMP(env, fmt, ...) \ do { \ fprintf(stderr, fmt , ## __VA_ARGS__); \ - cpu_dump_state(env, stderr, fprintf, 0); \ + cpu_dump_state(ENV_GET_CPU(env), stderr, fprintf, 0); \ qemu_log(fmt, ## __VA_ARGS__); \ if (qemu_log_enabled()) { \ log_cpu_state(env, 0); \ @@ -2391,7 +2392,7 @@ done_syscall: error: fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); abort(); } process_pending_signals(env); @@ -2403,6 +2404,7 @@ error: void cpu_loop(CPUOpenRISCState *env) { + CPUState *cs = CPU(openrisc_env_get_cpu(env)); int trapnr, gdbsig; for (;;) { @@ -2420,7 +2422,7 @@ void cpu_loop(CPUOpenRISCState *env) break; case EXCP_DPF: case EXCP_IPF: - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); gdbsig = TARGET_SIGSEGV; break; case EXCP_TICK: @@ -2469,7 +2471,7 @@ void cpu_loop(CPUOpenRISCState *env) default: qemu_log("\nqemu: unhandled CPU exception %#x - aborting\n", trapnr); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); gdbsig = TARGET_SIGILL; break; } @@ -2489,6 +2491,7 @@ void cpu_loop(CPUOpenRISCState *env) #ifdef TARGET_SH4 void cpu_loop(CPUSH4State *env) { + CPUState *cs = CPU(sh_env_get_cpu(env)); int trapnr, ret; target_siginfo_t info; @@ -2537,7 +2540,7 @@ void cpu_loop(CPUSH4State *env) default: printf ("Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); exit (1); } process_pending_signals (env); @@ -2548,6 +2551,7 @@ void cpu_loop(CPUSH4State *env) #ifdef TARGET_CRIS void cpu_loop(CPUCRISState *env) { + CPUState *cs = CPU(cris_env_get_cpu(env)); int trapnr, ret; target_siginfo_t info; @@ -2595,7 +2599,7 @@ void cpu_loop(CPUCRISState *env) break; default: printf ("Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); exit (1); } process_pending_signals (env); @@ -2606,6 +2610,7 @@ void cpu_loop(CPUCRISState *env) #ifdef TARGET_MICROBLAZE void cpu_loop(CPUMBState *env) { + CPUState *cs = CPU(mb_env_get_cpu(env)); int trapnr, ret; target_siginfo_t info; @@ -2673,7 +2678,7 @@ void cpu_loop(CPUMBState *env) default: printf ("Unhandled hw-exception: 0x%x\n", env->sregs[SR_ESR] & ESR_EC_MASK); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); exit (1); break; } @@ -2694,7 +2699,7 @@ void cpu_loop(CPUMBState *env) break; default: printf ("Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); exit (1); } process_pending_signals (env); @@ -2706,6 +2711,7 @@ void cpu_loop(CPUMBState *env) void cpu_loop(CPUM68KState *env) { + CPUState *cs = CPU(m68k_env_get_cpu(env)); int trapnr; unsigned int n; target_siginfo_t info; @@ -2787,7 +2793,7 @@ void cpu_loop(CPUM68KState *env) default: fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); abort(); } process_pending_signals(env); @@ -2843,6 +2849,7 @@ static void do_store_exclusive(CPUAlphaState *env, int reg, int quad) void cpu_loop(CPUAlphaState *env) { + CPUState *cs = CPU(alpha_env_get_cpu(env)); int trapnr; target_siginfo_t info; abi_long sysret; @@ -3017,7 +3024,7 @@ void cpu_loop(CPUAlphaState *env) break; default: printf ("Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); exit (1); } process_pending_signals (env); @@ -3028,6 +3035,7 @@ void cpu_loop(CPUAlphaState *env) #ifdef TARGET_S390X void cpu_loop(CPUS390XState *env) { + CPUState *cs = CPU(s390_env_get_cpu(env)); int trapnr, n, sig; target_siginfo_t info; target_ulong addr; @@ -3118,7 +3126,7 @@ void cpu_loop(CPUS390XState *env) default: fprintf(stderr, "Unhandled program exception: %#x\n", n); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); exit(1); } break; @@ -3135,7 +3143,7 @@ void cpu_loop(CPUS390XState *env) default: fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, fprintf, 0); exit(1); } process_pending_signals (env); diff --git a/monitor.c b/monitor.c index 19c297d..9be515c 100644 --- a/monitor.c +++ b/monitor.c @@ -921,9 +921,11 @@ int monitor_get_cpu_index(void) static void do_info_registers(Monitor *mon, const QDict *qdict) { + CPUState *cpu; CPUArchState *env; env = mon_get_cpu(); - cpu_dump_state(env, (FILE *)mon, monitor_fprintf, CPU_DUMP_FPU); + cpu = ENV_GET_CPU(env); + cpu_dump_state(cpu, (FILE *)mon, monitor_fprintf, CPU_DUMP_FPU); } static void do_info_jit(Monitor *mon, const QDict *qdict) @@ -948,16 +950,15 @@ static void do_info_history(Monitor *mon, const QDict *qdict) } } -#if defined(TARGET_PPC) -/* XXX: not implemented in other targets */ static void do_info_cpu_stats(Monitor *mon, const QDict *qdict) { + CPUState *cpu; CPUArchState *env; env = mon_get_cpu(); - cpu_dump_statistics(env, (FILE *)mon, &monitor_fprintf, 0); + cpu = ENV_GET_CPU(env); + cpu_dump_statistics(cpu, (FILE *)mon, &monitor_fprintf, 0); } -#endif static void do_trace_print_events(Monitor *mon, const QDict *qdict) { @@ -2678,7 +2679,6 @@ static mon_cmd_t info_cmds[] = { .help = "show the current VM UUID", .mhandler.cmd = hmp_info_uuid, }, -#if defined(TARGET_PPC) { .name = "cpustats", .args_type = "", @@ -2686,7 +2686,6 @@ static mon_cmd_t info_cmds[] = { .help = "show CPU statistics", .mhandler.cmd = do_info_cpu_stats, }, -#endif #if defined(CONFIG_SLIRP) { .name = "usernet", diff --git a/qom/cpu.c b/qom/cpu.c index 8a122b0..4da6332 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -18,8 +18,8 @@ * <http://www.gnu.org/licenses/gpl-2.0.html> */ -#include "qom/cpu.h" #include "qemu-common.h" +#include "qom/cpu.h" #include "sysemu/kvm.h" #include "qemu/notify.h" #include "sysemu/sysemu.h" @@ -156,6 +156,26 @@ static int cpu_common_write_elf64_note(WriteCoreDumpFunction f, } +void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, + int flags) +{ + CPUClass *cc = CPU_GET_CLASS(cpu); + + if (cc->dump_state) { + cc->dump_state(cpu, f, cpu_fprintf, flags); + } +} + +void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, + int flags) +{ + CPUClass *cc = CPU_GET_CLASS(cpu); + + if (cc->dump_statistics) { + cc->dump_statistics(cpu, f, cpu_fprintf, flags); + } +} + void cpu_reset(CPUState *cpu) { CPUClass *klass = CPU_GET_CLASS(cpu); diff --git a/stubs/cpus.c b/stubs/cpus.c index 37000dd..f0d56c5 100644 --- a/stubs/cpus.c +++ b/stubs/cpus.c @@ -1,3 +1,4 @@ +#include "qemu-common.h" #include "qom/cpu.h" void cpu_resume(CPUState *cpu) diff --git a/target-alpha/cpu-qom.h b/target-alpha/cpu-qom.h index 32ee286..95ae747 100644 --- a/target-alpha/cpu-qom.h +++ b/target-alpha/cpu-qom.h @@ -75,5 +75,7 @@ static inline AlphaCPU *alpha_env_get_cpu(CPUAlphaState *env) #define ENV_OFFSET offsetof(AlphaCPU, env) void alpha_cpu_do_interrupt(CPUState *cpu); +void alpha_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags); #endif diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index cad1716..395551a 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -264,6 +264,7 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = alpha_cpu_class_by_name; cc->do_interrupt = alpha_cpu_do_interrupt; + cc->dump_state = alpha_cpu_dump_state; } static const TypeInfo alpha_cpu_type_info = { diff --git a/target-alpha/helper.c b/target-alpha/helper.c index 5741ec2..ff57dd6 100644 --- a/target-alpha/helper.c +++ b/target-alpha/helper.c @@ -464,8 +464,8 @@ void alpha_cpu_do_interrupt(CPUState *cs) #endif /* !USER_ONLY */ } -void cpu_dump_state (CPUAlphaState *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void alpha_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags) { static const char *linux_reg_names[] = { "v0 ", "t0 ", "t1 ", "t2 ", "t3 ", "t4 ", "t5 ", "t6 ", @@ -473,6 +473,8 @@ void cpu_dump_state (CPUAlphaState *env, FILE *f, fprintf_function cpu_fprintf, "a0 ", "a1 ", "a2 ", "a3 ", "a4 ", "a5 ", "t8 ", "t9 ", "t10", "t11", "ra ", "t12", "at ", "gp ", "sp ", "zero", }; + AlphaCPU *cpu = ALPHA_CPU(cs); + CPUAlphaState *env = &cpu->env; int i; cpu_fprintf(f, " PC " TARGET_FMT_lx " PS %02x\n", diff --git a/target-arm/arm-semi.c b/target-arm/arm-semi.c index f0637a4..5f01bca 100644 --- a/target-arm/arm-semi.c +++ b/target-arm/arm-semi.c @@ -178,6 +178,7 @@ static void arm_semi_flen_cb(CPUARMState *env, target_ulong ret, target_ulong er #define SET_ARG(n, val) put_user_ual(val, args + (n) * 4) uint32_t do_arm_semihosting(CPUARMState *env) { + ARMCPU *cpu = arm_env_get_cpu(env); target_ulong args; target_ulong arg0, arg1, arg2, arg3; char * s; @@ -549,7 +550,7 @@ uint32_t do_arm_semihosting(CPUARMState *env) exit(0); default: fprintf(stderr, "qemu: Unsupported SemiHosting SWI 0x%02x\n", nr); - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(CPU(cpu), stderr, fprintf, 0); abort(); } } diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index 12fcefe..9d70ec4 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -120,4 +120,7 @@ void register_cp_regs_for_features(ARMCPU *cpu); void arm_cpu_do_interrupt(CPUState *cpu); void arm_v7m_cpu_do_interrupt(CPUState *cpu); +void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags); + #endif diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 496a59f..a40290c 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -814,6 +814,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = arm_cpu_class_by_name; cc->do_interrupt = arm_cpu_do_interrupt; + cc->dump_state = arm_cpu_dump_state; cpu_class_set_vmsd(cc, &vmstate_arm_cpu); } diff --git a/target-arm/translate.c b/target-arm/translate.c index b3f26d6..36a8cb5 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -10085,9 +10085,11 @@ static const char *cpu_mode_names[16] = { "???", "???", "???", "und", "???", "???", "???", "sys" }; -void cpu_dump_state(CPUARMState *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; int i; uint32_t psr; diff --git a/target-cris/cpu-qom.h b/target-cris/cpu-qom.h index 03829bd..e08bdb1 100644 --- a/target-cris/cpu-qom.h +++ b/target-cris/cpu-qom.h @@ -76,4 +76,7 @@ static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env) void cris_cpu_do_interrupt(CPUState *cpu); void crisv10_cpu_do_interrupt(CPUState *cpu); +void cris_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags); + #endif diff --git a/target-cris/cpu.c b/target-cris/cpu.c index 67181e5..82271f7 100644 --- a/target-cris/cpu.c +++ b/target-cris/cpu.c @@ -252,6 +252,7 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = cris_cpu_class_by_name; cc->do_interrupt = cris_cpu_do_interrupt; + cc->dump_state = cris_cpu_dump_state; } static const TypeInfo cris_cpu_type_info = { diff --git a/target-cris/helper.c b/target-cris/helper.c index 466cc2f..aba7537 100644 --- a/target-cris/helper.c +++ b/target-cris/helper.c @@ -53,9 +53,11 @@ void crisv10_cpu_do_interrupt(CPUState *cs) int cpu_cris_handle_mmu_fault(CPUCRISState * env, target_ulong address, int rw, int mmu_idx) { + CRISCPU *cpu = cris_env_get_cpu(env); + env->exception_index = 0xaa; env->pregs[PR_EDA] = address; - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(CPU(cpu), stderr, fprintf, 0); return 1; } diff --git a/target-cris/translate.c b/target-cris/translate.c index dbcb811..09d0d2b 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -3427,9 +3427,11 @@ void gen_intermediate_code_pc (CPUCRISState *env, struct TranslationBlock *tb) gen_intermediate_code_internal(env, tb, 1); } -void cpu_dump_state (CPUCRISState *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void cris_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags) { + CRISCPU *cpu = CRIS_CPU(cs); + CPUCRISState *env = &cpu->env; int i; uint32_t srs; diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index e0ac072..b7c70d6 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -101,4 +101,7 @@ int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, void x86_cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, Error **errp); +void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags); + #endif diff --git a/target-i386/cpu.c b/target-i386/cpu.c index a7154af..48c062f 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2526,6 +2526,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->reset = x86_cpu_reset; cc->do_interrupt = x86_cpu_do_interrupt; + cc->dump_state = x86_cpu_dump_state; cc->get_arch_id = x86_cpu_get_arch_id; cc->get_paging_enabled = x86_cpu_get_paging_enabled; #ifndef CONFIG_USER_ONLY diff --git a/target-i386/helper.c b/target-i386/helper.c index 803945d..5e5abe3 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -179,10 +179,11 @@ done: #define DUMP_CODE_BYTES_TOTAL 50 #define DUMP_CODE_BYTES_BACKWARD 20 -void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags) { - CPUState *cs = CPU(x86_env_get_cpu(env)); + X86CPU *cpu = X86_CPU(cs); + CPUX86State *env = &cpu->env; int eflags, i, nb; char cc_op_name[32]; static const char *seg_name[6] = { "ES", "CS", "SS", "DS", "FS", "GS" }; diff --git a/target-lm32/cpu-qom.h b/target-lm32/cpu-qom.h index 9571860..5ef884b 100644 --- a/target-lm32/cpu-qom.h +++ b/target-lm32/cpu-qom.h @@ -76,5 +76,7 @@ extern const struct VMStateDescription vmstate_lm32_cpu; #endif void lm32_cpu_do_interrupt(CPUState *cpu); +void lm32_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, + int flags); #endif diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c index 23c05dd..2366152 100644 --- a/target-lm32/cpu.c +++ b/target-lm32/cpu.c @@ -85,6 +85,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data) cc->reset = lm32_cpu_reset; cc->do_interrupt = lm32_cpu_do_interrupt; + cc->dump_state = lm32_cpu_dump_state; cpu_class_set_vmsd(cc, &vmstate_lm32_cpu); } diff --git a/target-lm32/translate.c b/target-lm32/translate.c index af9ce8c..227a801 100644 --- a/target-lm32/translate.c +++ b/target-lm32/translate.c @@ -1141,9 +1141,11 @@ void gen_intermediate_code_pc(CPULM32State *env, struct TranslationBlock *tb) gen_intermediate_code_internal(env, tb, 1); } -void cpu_dump_state(CPULM32State *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void lm32_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags) { + LM32CPU *cpu = LM32_CPU(cs); + CPULM32State *env = &cpu->env; int i; if (!env || !f) { diff --git a/target-m68k/cpu-qom.h b/target-m68k/cpu-qom.h index 846aa74..2436c13 100644 --- a/target-m68k/cpu-qom.h +++ b/target-m68k/cpu-qom.h @@ -71,5 +71,7 @@ static inline M68kCPU *m68k_env_get_cpu(CPUM68KState *env) #define ENV_OFFSET offsetof(M68kCPU, env) void m68k_cpu_do_interrupt(CPUState *cpu); +void m68k_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, + int flags); #endif diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c index 3c65b4e..d501027 100644 --- a/target-m68k/cpu.c +++ b/target-m68k/cpu.c @@ -187,6 +187,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) cc->class_by_name = m68k_cpu_class_by_name; cc->do_interrupt = m68k_cpu_do_interrupt; + cc->dump_state = m68k_cpu_dump_state; dc->vmsd = &vmstate_m68k_cpu; } diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 32b8132..3752094 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -3104,9 +3104,11 @@ void gen_intermediate_code_pc(CPUM68KState *env, TranslationBlock *tb) gen_intermediate_code_internal(env, tb, 1); } -void cpu_dump_state(CPUM68KState *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void m68k_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags) { + M68kCPU *cpu = M68K_CPU(cs); + CPUM68KState *env = &cpu->env; int i; uint16_t sr; CPU_DoubleU u; diff --git a/target-microblaze/cpu-qom.h b/target-microblaze/cpu-qom.h index ce92a4e..3e9c206 100644 --- a/target-microblaze/cpu-qom.h +++ b/target-microblaze/cpu-qom.h @@ -72,5 +72,7 @@ static inline MicroBlazeCPU *mb_env_get_cpu(CPUMBState *env) #define ENV_OFFSET offsetof(MicroBlazeCPU, env) void mb_cpu_do_interrupt(CPUState *cs); +void mb_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, + int flags); #endif diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index 404f82c..e8104d1 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -138,6 +138,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) cc->reset = mb_cpu_reset; cc->do_interrupt = mb_cpu_do_interrupt; + cc->dump_state = mb_cpu_dump_state; dc->vmsd = &vmstate_mb_cpu; dc->props = mb_properties; diff --git a/target-microblaze/helper.c b/target-microblaze/helper.c index 0dd669d..01d4bbf 100644 --- a/target-microblaze/helper.c +++ b/target-microblaze/helper.c @@ -39,8 +39,10 @@ void mb_cpu_do_interrupt(CPUState *cs) int cpu_mb_handle_mmu_fault(CPUMBState * env, target_ulong address, int rw, int mmu_idx) { + MicroBlazeCPU *cpu = mb_env_get_cpu(env); + env->exception_index = 0xaa; - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(CPU(cpu), stderr, fprintf, 0); return 1; } diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 06d2346..54f439f 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -1949,9 +1949,11 @@ void gen_intermediate_code_pc (CPUMBState *env, struct TranslationBlock *tb) gen_intermediate_code_internal(env, tb, 1); } -void cpu_dump_state (CPUMBState *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void mb_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags) { + MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); + CPUMBState *env = &cpu->env; int i; if (!env || !f) diff --git a/target-mips/cpu-qom.h b/target-mips/cpu-qom.h index 32e3cad..a7ff9e6 100644 --- a/target-mips/cpu-qom.h +++ b/target-mips/cpu-qom.h @@ -75,5 +75,7 @@ static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env) #define ENV_OFFSET offsetof(MIPSCPU, env) void mips_cpu_do_interrupt(CPUState *cpu); +void mips_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, + int flags); #endif diff --git a/target-mips/cpu.c b/target-mips/cpu.c index 5315f7b..b685d39 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -80,6 +80,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) cc->reset = mips_cpu_reset; cc->do_interrupt = mips_cpu_do_interrupt; + cc->dump_state = mips_cpu_dump_state; } static const TypeInfo mips_cpu_type_info = { diff --git a/target-mips/translate.c b/target-mips/translate.c index 0a53203..160c0c0 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -15780,9 +15780,11 @@ cpu_mips_check_sign_extensions (CPUMIPSState *env, FILE *f, } #endif -void cpu_dump_state (CPUMIPSState *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void mips_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags) { + MIPSCPU *cpu = MIPS_CPU(cs); + CPUMIPSState *env = &cpu->env; int i; cpu_fprintf(f, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c index f2b0791..3c3932c 100644 --- a/target-moxie/cpu.c +++ b/target-moxie/cpu.c @@ -97,8 +97,9 @@ static void moxie_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = moxie_cpu_class_by_name; - cpu_class_set_vmsd(cc, &vmstate_moxie_cpu); cc->do_interrupt = moxie_cpu_do_interrupt; + cc->dump_state = moxie_cpu_dump_state; + cpu_class_set_vmsd(cc, &vmstate_moxie_cpu); } static void moxielite_initfn(Object *obj) diff --git a/target-moxie/cpu.h b/target-moxie/cpu.h index a9d9ace..374b24a 100644 --- a/target-moxie/cpu.h +++ b/target-moxie/cpu.h @@ -116,6 +116,8 @@ static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState *env) MoxieCPU *cpu_moxie_init(const char *cpu_model); int cpu_moxie_exec(CPUMoxieState *s); void moxie_cpu_do_interrupt(CPUState *cs); +void moxie_cpu_dump_state(CPUState *cpu, FILE *f, + fprintf_function cpu_fprintf, int flags); void moxie_translate_init(void); int cpu_moxie_signal_handler(int host_signum, void *pinfo, void *puc); diff --git a/target-moxie/helper.c b/target-moxie/helper.c index 5cfe889..ea0788f 100644 --- a/target-moxie/helper.c +++ b/target-moxie/helper.c @@ -110,9 +110,11 @@ void moxie_cpu_do_interrupt(CPUState *env) int cpu_moxie_handle_mmu_fault(CPUMoxieState *env, target_ulong address, int rw, int mmu_idx) { + MoxieCPU *cpu = moxie_env_get_cpu(env); + env->exception_index = 0xaa; env->debug1 = address; - cpu_dump_state(env, stderr, fprintf, 0); + cpu_dump_state(CPU(cpu), stderr, fprintf, 0); return 1; } diff --git a/target-moxie/translate.c b/target-moxie/translate.c index cc02bd3..b0ae38a 100644 --- a/target-moxie/translate.c +++ b/target-moxie/translate.c @@ -74,9 +74,11 @@ static int extract_branch_offset(int opcode) return (((signed short)((opcode & ((1 << 10) - 1)) << 6)) >> 6) << 1; } -void cpu_dump_state(CPUArchState *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void moxie_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags) { + MoxieCPU *cpu = MOXIE_CPU(cs); + CPUMoxieState *env = &cpu->env; int i; cpu_fprintf(f, "pc=0x%08x\n", env->pc); cpu_fprintf(f, "$fp=0x%08x $sp=0x%08x $r0=0x%08x $r1=0x%08x\n", diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index ffe14f3..82bee2a 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -149,6 +149,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = openrisc_cpu_class_by_name; cc->do_interrupt = openrisc_cpu_do_interrupt; + cc->dump_state = openrisc_cpu_dump_state; } static void cpu_register(const OpenRISCCPUInfo *info) diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index b9c55ba..eb4d282 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -347,6 +347,8 @@ OpenRISCCPU *cpu_openrisc_init(const char *cpu_model); void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf); int cpu_openrisc_exec(CPUOpenRISCState *s); void openrisc_cpu_do_interrupt(CPUState *cpu); +void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, + fprintf_function cpu_fprintf, int flags); void openrisc_translate_init(void); int cpu_openrisc_handle_mmu_fault(CPUOpenRISCState *env, target_ulong address, diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 0eafd02..c59fd02 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -1814,15 +1814,17 @@ void gen_intermediate_code_pc(CPUOpenRISCState *env, gen_intermediate_code_internal(openrisc_env_get_cpu(env), tb, 1); } -void cpu_dump_state(CPUOpenRISCState *env, FILE *f, - fprintf_function cpu_fprintf, - int flags) +void openrisc_cpu_dump_state(CPUState *cs, FILE *f, + fprintf_function cpu_fprintf, + int flags) { + OpenRISCCPU *cpu = OPENRISC_CPU(cs); + CPUOpenRISCState *env = &cpu->env; int i; - uint32_t *regs = env->gpr; + cpu_fprintf(f, "PC=%08x\n", env->pc); for (i = 0; i < 32; ++i) { - cpu_fprintf(f, "R%02d=%08x%c", i, regs[i], + cpu_fprintf(f, "R%02d=%08x%c", i, env->gpr[i], (i % 4) == 3 ? '\n' : ' '); } } diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h index eb03a00..84ba105 100644 --- a/target-ppc/cpu-qom.h +++ b/target-ppc/cpu-qom.h @@ -101,5 +101,9 @@ static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env) PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr); void ppc_cpu_do_interrupt(CPUState *cpu); +void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, + int flags); +void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f, + fprintf_function cpu_fprintf, int flags); #endif diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 076cdac..3643863 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -9526,15 +9526,17 @@ GEN_SPEOP_LDST(evstwwo, 0x1E, 2), /*****************************************************************************/ /* Misc PowerPC helpers */ -void cpu_dump_state (CPUPPCState *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags) { #define RGPL 4 #define RFPL 4 + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; int i; - cpu_synchronize_state(CPU(ppc_env_get_cpu(env))); + cpu_synchronize_state(cs); cpu_fprintf(f, "NIP " TARGET_FMT_lx " LR " TARGET_FMT_lx " CTR " TARGET_FMT_lx " XER " TARGET_FMT_lx "\n", @@ -9675,14 +9677,15 @@ void cpu_dump_state (CPUPPCState *env, FILE *f, fprintf_function cpu_fprintf, #undef RFPL } -void cpu_dump_statistics (CPUPPCState *env, FILE*f, fprintf_function cpu_fprintf, - int flags) +void ppc_cpu_dump_statistics(CPUState *cs, FILE*f, + fprintf_function cpu_fprintf, int flags) { #if defined(DO_PPC_STATISTICS) + PowerPCCPU *cpu = POWERPC_CPU(cs); opc_handler_t **t1, **t2, **t3, *handler; int op1, op2, op3; - t1 = env->opcodes; + t1 = cpu->env.opcodes; for (op1 = 0; op1 < 64; op1++) { handler = t1[op1]; if (is_indirect_opcode(handler)) { diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 021a31e..0edb336 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8309,6 +8309,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = ppc_cpu_class_by_name; cc->do_interrupt = ppc_cpu_do_interrupt; + cc->dump_state = ppc_cpu_dump_state; + cc->dump_statistics = ppc_cpu_dump_statistics; } static const TypeInfo ppc_cpu_type_info = { diff --git a/target-s390x/cpu-qom.h b/target-s390x/cpu-qom.h index 34d45c2..ec32d21 100644 --- a/target-s390x/cpu-qom.h +++ b/target-s390x/cpu-qom.h @@ -72,5 +72,7 @@ static inline S390CPU *s390_env_get_cpu(CPUS390XState *env) #define ENV_OFFSET offsetof(S390CPU, env) void s390_cpu_do_interrupt(CPUState *cpu); +void s390_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, + int flags); #endif diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c index 23fe51f..8ec2f9b 100644 --- a/target-s390x/cpu.c +++ b/target-s390x/cpu.c @@ -170,6 +170,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) cc->reset = s390_cpu_reset; cc->do_interrupt = s390_cpu_do_interrupt; + cc->dump_state = s390_cpu_dump_state; dc->vmsd = &vmstate_s390_cpu; } diff --git a/target-s390x/translate.c b/target-s390x/translate.c index f97e431..cd9880e 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -86,9 +86,11 @@ static uint64_t pc_to_link_info(DisasContext *s, uint64_t pc) return pc; } -void cpu_dump_state(CPUS390XState *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void s390_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; int i; if (env->cc_op > 3) { diff --git a/target-sh4/cpu-qom.h b/target-sh4/cpu-qom.h index f8c80d3..01d1637 100644 --- a/target-sh4/cpu-qom.h +++ b/target-sh4/cpu-qom.h @@ -84,5 +84,7 @@ static inline SuperHCPU *sh_env_get_cpu(CPUSH4State *env) #define ENV_OFFSET offsetof(SuperHCPU, env) void superh_cpu_do_interrupt(CPUState *cpu); +void superh_cpu_dump_state(CPUState *cpu, FILE *f, + fprintf_function cpu_fprintf, int flags); #endif diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c index 898aecd..a7d5213 100644 --- a/target-sh4/cpu.c +++ b/target-sh4/cpu.c @@ -274,6 +274,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = superh_cpu_class_by_name; cc->do_interrupt = superh_cpu_do_interrupt; + cc->dump_state = superh_cpu_dump_state; dc->vmsd = &vmstate_sh_cpu; } diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 14fdb8f..292c9e9 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -150,10 +150,11 @@ void sh4_translate_init(void) done_init = 1; } -void cpu_dump_state(CPUSH4State * env, FILE * f, - int (*cpu_fprintf) (FILE * f, const char *fmt, ...), - int flags) +void superh_cpu_dump_state(CPUState *cs, FILE *f, + fprintf_function cpu_fprintf, int flags) { + SuperHCPU *cpu = SUPERH_CPU(cs); + CPUSH4State *env = &cpu->env; int i; cpu_fprintf(f, "pc=0x%08x sr=0x%08x pr=0x%08x fpscr=0x%08x\n", env->pc, env->sr, env->pr, env->fpscr); diff --git a/target-sparc/cpu-qom.h b/target-sparc/cpu-qom.h index d4fe89e..97c1ec7 100644 --- a/target-sparc/cpu-qom.h +++ b/target-sparc/cpu-qom.h @@ -76,5 +76,7 @@ static inline SPARCCPU *sparc_env_get_cpu(CPUSPARCState *env) #define ENV_OFFSET offsetof(SPARCCPU, env) void sparc_cpu_do_interrupt(CPUState *cpu); +void sparc_cpu_dump_state(CPUState *cpu, FILE *f, + fprintf_function cpu_fprintf, int flags); #endif diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c index 290b580..79e391f 100644 --- a/target-sparc/cpu.c +++ b/target-sparc/cpu.c @@ -660,9 +660,11 @@ static void cpu_print_cc(FILE *f, fprintf_function cpu_fprintf, #define REGS_PER_LINE 8 #endif -void cpu_dump_state(CPUSPARCState *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void sparc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, + int flags) { + SPARCCPU *cpu = SPARC_CPU(cs); + CPUSPARCState *env = &cpu->env; int i, x; cpu_fprintf(f, "pc: " TARGET_FMT_lx " npc: " TARGET_FMT_lx "\n", env->pc, @@ -771,6 +773,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) cc->reset = sparc_cpu_reset; cc->do_interrupt = sparc_cpu_do_interrupt; + cc->dump_state = sparc_cpu_dump_state; } static const TypeInfo sparc_cpu_type_info = { diff --git a/target-unicore32/cpu-qom.h b/target-unicore32/cpu-qom.h index ba4dee4..7eec448 100644 --- a/target-unicore32/cpu-qom.h +++ b/target-unicore32/cpu-qom.h @@ -61,5 +61,7 @@ static inline UniCore32CPU *uc32_env_get_cpu(CPUUniCore32State *env) #define ENV_OFFSET offsetof(UniCore32CPU, env) void uc32_cpu_do_interrupt(CPUState *cpu); +void uc32_cpu_dump_state(CPUState *cpu, FILE *f, + fprintf_function cpu_fprintf, int flags); #endif diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c index 66a1a74..1a97e6b 100644 --- a/target-unicore32/cpu.c +++ b/target-unicore32/cpu.c @@ -133,6 +133,7 @@ static void uc32_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = uc32_cpu_class_by_name; cc->do_interrupt = uc32_cpu_do_interrupt; + cc->dump_state = uc32_cpu_dump_state; dc->vmsd = &vmstate_uc32_cpu; } diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c index 3dc7856..e1fe4e6 100644 --- a/target-unicore32/translate.c +++ b/target-unicore32/translate.c @@ -2113,9 +2113,11 @@ static void cpu_dump_state_ucf64(CPUUniCore32State *env, FILE *f, #define cpu_dump_state_ucf64(env, file, pr, flags) do { } while (0) #endif -void cpu_dump_state(CPUUniCore32State *env, FILE *f, - fprintf_function cpu_fprintf, int flags) +void uc32_cpu_dump_state(CPUState *cs, FILE *f, + fprintf_function cpu_fprintf, int flags) { + UniCore32CPU *cpu = UNICORE32_CPU(cs); + CPUUniCore32State *env = &cpu->env; int i; uint32_t psr; diff --git a/target-xtensa/cpu-qom.h b/target-xtensa/cpu-qom.h index af0ce28..30506cf 100644 --- a/target-xtensa/cpu-qom.h +++ b/target-xtensa/cpu-qom.h @@ -81,5 +81,7 @@ static inline XtensaCPU *xtensa_env_get_cpu(const CPUXtensaState *env) #define ENV_OFFSET offsetof(XtensaCPU, env) void xtensa_cpu_do_interrupt(CPUState *cpu); +void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, + fprintf_function cpu_fprintf, int flags); #endif diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c index 6e93dd8..b5df321 100644 --- a/target-xtensa/cpu.c +++ b/target-xtensa/cpu.c @@ -102,6 +102,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data) cc->reset = xtensa_cpu_reset; cc->do_interrupt = xtensa_cpu_do_interrupt; + cc->dump_state = xtensa_cpu_dump_state; dc->vmsd = &vmstate_xtensa_cpu; } diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c index 1037101..4c41de0 100644 --- a/target-xtensa/op_helper.c +++ b/target-xtensa/op_helper.c @@ -368,7 +368,9 @@ void HELPER(wsr_lend)(CPUXtensaState *env, uint32_t v) void HELPER(dump_state)(CPUXtensaState *env) { - cpu_dump_state(env, stderr, fprintf, 0); + XtensaCPU *cpu = xtensa_env_get_cpu(env); + + cpu_dump_state(CPU(cpu), stderr, fprintf, 0); } void HELPER(waiti)(CPUXtensaState *env, uint32_t pc, uint32_t intlevel) diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index 06d68db..dcb90a5 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -3014,9 +3014,11 @@ void gen_intermediate_code_pc(CPUXtensaState *env, TranslationBlock *tb) gen_intermediate_code_internal(env, tb, 1); } -void cpu_dump_state(CPUXtensaState *env, FILE *f, fprintf_function cpu_fprintf, - int flags) +void xtensa_cpu_dump_state(CPUState *cs, FILE *f, + fprintf_function cpu_fprintf, int flags) { + XtensaCPU *cpu = XTENSA_CPU(cs); + CPUXtensaState *env = &cpu->env; int i, j; cpu_fprintf(f, "PC=%08x\n\n", env->pc);

[qom-cpu,18/59] cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks

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Patch