From patchwork Wed Aug 20 13:36:27 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mihai Caraman X-Patchwork-Id: 4751291 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E3473C0338 for ; Wed, 20 Aug 2014 13:37:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A043320107 for ; Wed, 20 Aug 2014 13:37:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3556C2014A for ; Wed, 20 Aug 2014 13:36:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752020AbaHTNgv (ORCPT ); Wed, 20 Aug 2014 09:36:51 -0400 Received: from dns-bn1lp0143.outbound.protection.outlook.com ([207.46.163.143]:47755 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751691AbaHTNgs (ORCPT ); Wed, 20 Aug 2014 09:36:48 -0400 Received: from CH1PR03CA008.namprd03.prod.outlook.com (10.255.156.153) by DM2PR03MB509.namprd03.prod.outlook.com (10.141.87.12) with Microsoft SMTP Server (TLS) id 15.0.1010.18; Wed, 20 Aug 2014 13:36:43 +0000 Received: from BN1BFFO11FD037.protection.gbl (10.255.156.132) by CH1PR03CA008.outlook.office365.com (10.255.156.153) with Microsoft SMTP Server (TLS) id 15.0.1010.18 via Frontend Transport; Wed, 20 Aug 2014 13:36:42 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BN1BFFO11FD037.mail.protection.outlook.com (10.58.144.100) with Microsoft SMTP Server (TLS) id 15.0.1010.11 via Frontend Transport; Wed, 20 Aug 2014 13:36:42 +0000 Received: from fsr-fed1764-012.ea.freescale.net (fsr-fed1764-012-010171073213.ea.freescale.net [10.171.73.213]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s7KDaUQr024600; Wed, 20 Aug 2014 06:36:40 -0700 From: Mihai Caraman To: CC: , , Mihai Caraman Subject: [PATCH v4 6/6] KVM: PPC: Booke: Add ONE_REG support for IVPR and IVORs Date: Wed, 20 Aug 2014 16:36:27 +0300 Message-ID: <1408541787-24625-7-git-send-email-mihai.caraman@freescale.com> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1408541787-24625-1-git-send-email-mihai.caraman@freescale.com> References: <1408541787-24625-1-git-send-email-mihai.caraman@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(189002)(199003)(106466001)(74502001)(6806004)(2351001)(95666004)(104016003)(33646002)(229853001)(4396001)(50986999)(19580395003)(44976005)(62966002)(76482001)(79102001)(46102001)(110136001)(99396002)(19580405001)(69596002)(31966008)(48376002)(77982001)(21056001)(105606002)(74662001)(81156004)(85306004)(36756003)(97736001)(50466002)(86362001)(93916002)(20776003)(26826002)(104166001)(50226001)(85852003)(64706001)(84676001)(47776003)(88136002)(89996001)(92566001)(87936001)(107046002)(83322001)(76176999)(80022001)(87286001)(68736004)(102836001)(81342001)(92726001)(77156001)(83072002)(81542001); DIR:OUT; SFP:; SCL:1; SRVR:DM2PR03MB509; H:az84smr01.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;UriScan:; X-Forefront-PRVS: 03094A4065 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=mihai.caraman@freescale.com; X-OriginatorOrg: freescale.com Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add ONE_REG support for IVPR and IVORs registers. Implement IVPR, IVORs 0-15 and 35 in booke common layer. Signed-off-by: Mihai Caraman --- v4: - add ONE_REG IVPR - use IVPR, IVOR2 and IVOR8 setters - add api documentation for ONE_REG IVPR and IVORs v3: - new patch Documentation/virtual/kvm/api.txt | 7 ++ arch/powerpc/include/uapi/asm/kvm.h | 25 +++++++ arch/powerpc/kvm/booke.c | 145 ++++++++++++++++++++++++++++++++++++ arch/powerpc/kvm/e500.c | 42 ++++++++++- arch/powerpc/kvm/e500mc.c | 16 ++++ 5 files changed, 233 insertions(+), 2 deletions(-) diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index beae3fd..cd7b171 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -1917,6 +1917,13 @@ registers, find a list below: PPC | KVM_REG_PPC_TM_VSCR | 32 PPC | KVM_REG_PPC_TM_DSCR | 64 PPC | KVM_REG_PPC_TM_TAR | 64 + PPC | KVM_REG_PPC_IVPR | 64 + PPC | KVM_REG_PPC_IVOR0 | 32 + ... + PPC | KVM_REG_PPC_IVOR15 | 32 + PPC | KVM_REG_PPC_IVOR32 | 32 + ... + PPC | KVM_REG_PPC_IVOR37 | 32 | | MIPS | KVM_REG_MIPS_R0 | 64 ... diff --git a/arch/powerpc/include/uapi/asm/kvm.h b/arch/powerpc/include/uapi/asm/kvm.h index ab4d473..c97f119 100644 --- a/arch/powerpc/include/uapi/asm/kvm.h +++ b/arch/powerpc/include/uapi/asm/kvm.h @@ -564,6 +564,31 @@ struct kvm_get_htab_header { #define KVM_REG_PPC_SPRG9 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xba) #define KVM_REG_PPC_DBSR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbb) +/* Booke IVPR & IVOR registers */ +#define KVM_REG_PPC_IVPR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xbc) +#define KVM_REG_PPC_IVOR0 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbd) +#define KVM_REG_PPC_IVOR1 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbe) +#define KVM_REG_PPC_IVOR2 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbf) +#define KVM_REG_PPC_IVOR3 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc0) +#define KVM_REG_PPC_IVOR4 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc1) +#define KVM_REG_PPC_IVOR5 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc2) +#define KVM_REG_PPC_IVOR6 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc3) +#define KVM_REG_PPC_IVOR7 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc4) +#define KVM_REG_PPC_IVOR8 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc5) +#define KVM_REG_PPC_IVOR9 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc6) +#define KVM_REG_PPC_IVOR10 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc7) +#define KVM_REG_PPC_IVOR11 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc8) +#define KVM_REG_PPC_IVOR12 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xc9) +#define KVM_REG_PPC_IVOR13 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xca) +#define KVM_REG_PPC_IVOR14 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xcb) +#define KVM_REG_PPC_IVOR15 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xcc) +#define KVM_REG_PPC_IVOR32 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xcd) +#define KVM_REG_PPC_IVOR33 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xce) +#define KVM_REG_PPC_IVOR34 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xcf) +#define KVM_REG_PPC_IVOR35 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xd0) +#define KVM_REG_PPC_IVOR36 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xd1) +#define KVM_REG_PPC_IVOR37 (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xd2) + /* Transactional Memory checkpointed state: * This is all GPRs, all VSX regs and a subset of SPRs */ diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c index d4df648..1cb2a2a 100644 --- a/arch/powerpc/kvm/booke.c +++ b/arch/powerpc/kvm/booke.c @@ -1570,6 +1570,75 @@ int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, int r = 0; switch (id) { + case KVM_REG_PPC_IVPR: + *val = get_reg_val(id, vcpu->arch.ivpr); + break; + case KVM_REG_PPC_IVOR0: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]); + break; + case KVM_REG_PPC_IVOR1: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]); + break; + case KVM_REG_PPC_IVOR2: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]); + break; + case KVM_REG_PPC_IVOR3: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]); + break; + case KVM_REG_PPC_IVOR4: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]); + break; + case KVM_REG_PPC_IVOR5: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]); + break; + case KVM_REG_PPC_IVOR6: + *val = get_reg_val(id, vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]); + break; + case KVM_REG_PPC_IVOR7: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]); + break; + case KVM_REG_PPC_IVOR8: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]); + break; + case KVM_REG_PPC_IVOR9: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]); + break; + case KVM_REG_PPC_IVOR10: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]); + break; + case KVM_REG_PPC_IVOR11: + *val = get_reg_val(id, vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]); + break; + case KVM_REG_PPC_IVOR12: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]); + break; + case KVM_REG_PPC_IVOR13: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]); + break; + case KVM_REG_PPC_IVOR14: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]); + break; + case KVM_REG_PPC_IVOR15: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]); + break; + case KVM_REG_PPC_IVOR35: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]); + break; case KVM_REG_PPC_IAC1: *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1); break; @@ -1626,6 +1695,82 @@ int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, int r = 0; switch (id) { + case KVM_REG_PPC_IVPR: { + ulong new_ivpr = set_reg_val(id, *val); + + kvmppc_set_ivpr(vcpu, new_ivpr); + break; + } + case KVM_REG_PPC_IVOR0: + vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR1: + vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR2: { + u32 new_ivor = set_reg_val(id, *val); + + kvmppc_set_ivor2(vcpu, new_ivor); + break; + } + case KVM_REG_PPC_IVOR3: + vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR4: + vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR5: + vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR6: + vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR7: + vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR8: { + u32 new_ivor = set_reg_val(id, *val); + + kvmppc_set_ivor8(vcpu, new_ivor); + break; + } + case KVM_REG_PPC_IVOR9: + vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR10: + vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR11: + vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR12: + vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR13: + vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR14: + vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR15: + vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR35: + vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = + set_reg_val(id, *val); + break; case KVM_REG_PPC_IAC1: vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val); break; diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c index 2e02ed8..08f61bf 100644 --- a/arch/powerpc/kvm/e500.c +++ b/arch/powerpc/kvm/e500.c @@ -433,14 +433,52 @@ static int kvmppc_core_set_sregs_e500(struct kvm_vcpu *vcpu, static int kvmppc_get_one_reg_e500(struct kvm_vcpu *vcpu, u64 id, union kvmppc_one_reg *val) { - int r = kvmppc_get_one_reg_e500_tlb(vcpu, id, val); + int r = 0; + + switch (id) { + case KVM_REG_PPC_IVOR32: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]); + break; + case KVM_REG_PPC_IVOR33: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]); + break; + case KVM_REG_PPC_IVOR34: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]); + break; + default: + r = kvmppc_get_one_reg_e500_tlb(vcpu, id, val); + break; + } + return r; } static int kvmppc_set_one_reg_e500(struct kvm_vcpu *vcpu, u64 id, union kvmppc_one_reg *val) { - int r = kvmppc_get_one_reg_e500_tlb(vcpu, id, val); + int r = 0; + + switch (id) { + case KVM_REG_PPC_IVOR32: + vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR33: + vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = + set_reg_val(id, *val); + break; + case KVM_REG_PPC_IVOR34: + vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = + set_reg_val(id, *val); + break; + default: + r = kvmppc_get_one_reg_e500_tlb(vcpu, id, val); + break; + } + return r; } diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c index 4549349..0668bc7 100644 --- a/arch/powerpc/kvm/e500mc.c +++ b/arch/powerpc/kvm/e500mc.c @@ -268,6 +268,22 @@ static int kvmppc_get_one_reg_e500mc(struct kvm_vcpu *vcpu, u64 id, int r = 0; switch (id) { + case KVM_REG_PPC_IVOR32: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL]); + break; + case KVM_REG_PPC_IVOR33: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST]); + break; + case KVM_REG_PPC_IVOR36: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL]); + break; + case KVM_REG_PPC_IVOR37: + *val = get_reg_val(id, + vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT]); + break; case KVM_REG_PPC_SPRG9: *val = get_reg_val(id, vcpu->arch.sprg9); break;