| Message ID | 1429338232-11938-5-git-send-email-wei@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
2015-04-18 02:23-0400, Wei Huang: > This patch enables AMD guest VM to access (R/W) PMU related MSRs, which > include PERFCTR[0..3] and EVNTSEL[0..3]. > > Signed-off-by: Wei Huang <wei@redhat.com> > --- Reviewed-by: Radim Kr?má? <rkrcmar@redhat.com> > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > @@ -2268,27 +2268,17 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > * which we perfectly emulate ;-). Any other value should be at least > * reported, some guests depend on them. (This comment is a bit outdated now too.) > */ > - case MSR_K7_EVNTSEL0: > - case MSR_K7_EVNTSEL1: > - case MSR_K7_EVNTSEL2: > - case MSR_K7_EVNTSEL3: > - if (data != 0) > - vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: " > - "0x%x data 0x%llx\n", msr, data); > - break; > - /* at least RHEL 4 unconditionally writes to the perfctr registers, > - * so we ignore writes to make it happy. > - */ > @@ -2513,6 +2503,12 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) > case MSR_K7_EVNTSEL0: > case MSR_K7_EVNTSEL1: > case MSR_K7_EVNTSEL2: | case MSR_K7_EVNTSEL3: | case MSR_K7_PERFCTR0: > case MSR_K7_PERFCTR1: > case MSR_K7_PERFCTR2: > case MSR_K7_PERFCTR3: (As we depend on continuous ranges anyway, the GCCism comes to mind: 'case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:') > case MSR_P6_PERFCTR0: > case MSR_P6_PERFCTR1: > case MSR_P6_EVNTSEL0: -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index d465434..ee581cf 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2268,27 +2268,17 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) * which we perfectly emulate ;-). Any other value should be at least * reported, some guests depend on them. */ - case MSR_K7_EVNTSEL0: - case MSR_K7_EVNTSEL1: - case MSR_K7_EVNTSEL2: - case MSR_K7_EVNTSEL3: - if (data != 0) - vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: " - "0x%x data 0x%llx\n", msr, data); - break; - /* at least RHEL 4 unconditionally writes to the perfctr registers, - * so we ignore writes to make it happy. - */ case MSR_K7_PERFCTR0: case MSR_K7_PERFCTR1: case MSR_K7_PERFCTR2: case MSR_K7_PERFCTR3: - vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: " - "0x%x data 0x%llx\n", msr, data); - break; case MSR_P6_PERFCTR0: case MSR_P6_PERFCTR1: pr = true; + case MSR_K7_EVNTSEL0: + case MSR_K7_EVNTSEL1: + case MSR_K7_EVNTSEL2: + case MSR_K7_EVNTSEL3: case MSR_P6_EVNTSEL0: case MSR_P6_EVNTSEL1: if (kvm_pmu_msr(vcpu, msr)) @@ -2513,6 +2503,12 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) case MSR_K8_SYSCFG: case MSR_K7_HWCR: case MSR_VM_HSAVE_PA: + case MSR_K8_INT_PENDING_MSG: + case MSR_AMD64_NB_CFG: + case MSR_FAM10H_MMIO_CONF_BASE: + case MSR_AMD64_BU_CFG2: + data = 0; + break; case MSR_K7_EVNTSEL0: case MSR_K7_EVNTSEL1: case MSR_K7_EVNTSEL2: @@ -2521,12 +2517,6 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) case MSR_K7_PERFCTR1: case MSR_K7_PERFCTR2: case MSR_K7_PERFCTR3: - case MSR_K8_INT_PENDING_MSG: - case MSR_AMD64_NB_CFG: - case MSR_FAM10H_MMIO_CONF_BASE: - case MSR_AMD64_BU_CFG2: - data = 0; - break; case MSR_P6_PERFCTR0: case MSR_P6_PERFCTR1: case MSR_P6_EVNTSEL0:
This patch enables AMD guest VM to access (R/W) PMU related MSRs, which include PERFCTR[0..3] and EVNTSEL[0..3]. Signed-off-by: Wei Huang <wei@redhat.com> --- arch/x86/kvm/x86.c | 30 ++++++++++-------------------- 1 file changed, 10 insertions(+), 20 deletions(-)