From patchwork Mon Jul 6 02:17:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 6719321 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1F9489F38C for ; Mon, 6 Jul 2015 02:19:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2557820650 for ; Mon, 6 Jul 2015 02:19:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2329B2049C for ; Mon, 6 Jul 2015 02:19:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753695AbbGFCT0 (ORCPT ); Sun, 5 Jul 2015 22:19:26 -0400 Received: from mail-pa0-f49.google.com ([209.85.220.49]:33226 "EHLO mail-pa0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753683AbbGFCTX (ORCPT ); Sun, 5 Jul 2015 22:19:23 -0400 Received: by pacws9 with SMTP id ws9so88351996pac.0 for ; Sun, 05 Jul 2015 19:19:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vFxZlxpOKcI7wJo9qxM7Yv4eFgJKcjCAjM/CMgNLq6s=; b=CtrtBQN6RpsOMN+ZJYYRpBxuakP2+jfDw7RUB+bBeylAFUNksB76lGoPfrUig0SBXj bJvQCbZEa6HlkFmhhHxpLF/ce5KzBXxlA9+K6sndcEdnGlF5HJlB7cZ0X9eOwqhZHrpk 0W/Ijl4DD36MOCeNc0MOgqtluFdnI9B55/jR0Kg06uhZz/EhNzGIx0YrxwaN+0sM0A0i 2H783C+Ezn5UdDJy4lj9N2uwdl75bkFOJNc91FA7dVDibgZNXeVmGSmog1sF4AVMdx2M CypwrijroSkyAXUB/z5wfa+GnKq/88wD145hB1wspiKbI4ztouLALD75B4dGXfgM8xSG wOvA== X-Gm-Message-State: ALoCoQnmuPoWg5yhL/ZY3KlztABXaIpsr+X6bo6j+WEnULLzH+vsMsR60galx3cP7vOSyLhoupzm X-Received: by 10.70.42.101 with SMTP id n5mr101328268pdl.93.1436149163165; Sun, 05 Jul 2015 19:19:23 -0700 (PDT) Received: from localhost ([120.136.34.248]) by mx.google.com with ESMTPSA id y2sm16205123pdc.91.2015.07.05.19.19.21 (version=TLSv1 cipher=RC4-SHA bits=128/128); Sun, 05 Jul 2015 19:19:22 -0700 (PDT) From: shannon.zhao@linaro.org To: kvmarm@lists.cs.columbia.edu Cc: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, christoffer.dall@linaro.org, will.deacon@arm.com, marc.zyngier@arm.com, alex.bennee@linaro.org, shannon.zhao@linaro.org, zhaoshenglong@huawei.com Subject: [PATCH 18/18] KVM: ARM64: Add KVM_CAP_ARM_PMU and KVM_ARM_PMU_SET_IRQ Date: Mon, 6 Jul 2015 10:17:48 +0800 Message-Id: <1436149068-3784-19-git-send-email-shannon.zhao@linaro.org> X-Mailer: git-send-email 1.9.5.msysgit.1 In-Reply-To: <1436149068-3784-1-git-send-email-shannon.zhao@linaro.org> References: <1436149068-3784-1-git-send-email-shannon.zhao@linaro.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shannon Zhao Add KVM_CAP_ARM_PMU for userspace to check whether KVM supports PMU. Add KVM_ARM_PMU_SET_IRQ for userspace to set PMU IRQ number. Signed-off-by: Shannon Zhao --- arch/arm/kvm/arm.c | 8 ++++++++ include/kvm/arm_pmu.h | 5 +++++ include/uapi/linux/kvm.h | 4 ++++ virt/kvm/arm/pmu.c | 9 +++++++++ 4 files changed, 26 insertions(+) diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c index 41eb063..350866e 100644 --- a/arch/arm/kvm/arm.c +++ b/arch/arm/kvm/arm.c @@ -182,6 +182,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) case KVM_CAP_ARM_PSCI_0_2: case KVM_CAP_READONLY_MEM: case KVM_CAP_MP_STATE: + case KVM_CAP_ARM_PMU: r = 1; break; case KVM_CAP_COALESCED_MMIO: @@ -816,6 +817,13 @@ long kvm_arch_vcpu_ioctl(struct file *filp, return -E2BIG; return kvm_arm_copy_reg_indices(vcpu, user_list->reg); } + case KVM_ARM_PMU_SET_IRQ: { + uint32_t irq; + + if (copy_from_user(&irq, argp, sizeof(irq))) + return -EFAULT; + return kvm_pmu_set_irq_num(vcpu, irq); + } default: return -EINVAL; } diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h index 5bcf27b..1a93f53 100644 --- a/include/kvm/arm_pmu.h +++ b/include/kvm/arm_pmu.h @@ -58,6 +58,7 @@ void kvm_pmu_enable_interrupt(struct kvm_vcpu *vcpu, unsigned long val); void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, unsigned long val); void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, unsigned long data, unsigned long select_idx); +int kvm_pmu_set_irq_num(struct kvm_vcpu *vcpu, u32 irq); void kvm_pmu_init(struct kvm_vcpu *vcpu); #else void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) {} @@ -76,6 +77,10 @@ void kvm_pmu_enable_interrupt(struct kvm_vcpu *vcpu, unsigned long val) {} void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, unsigned long val) {} void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, unsigned long data, unsigned long select_idx) {} +int kvm_pmu_set_irq_num(struct kvm_vcpu *vcpu, u32 irq) +{ + return -ENXIO; +} static inline void kvm_pmu_init(struct kvm_vcpu *vcpu) {} #endif diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h index 716ad4a..90f5e73 100644 --- a/include/uapi/linux/kvm.h +++ b/include/uapi/linux/kvm.h @@ -817,6 +817,7 @@ struct kvm_ppc_smmu_info { #define KVM_CAP_DISABLE_QUIRKS 116 #define KVM_CAP_X86_SMM 117 #define KVM_CAP_MULTI_ADDRESS_SPACE 118 +#define KVM_CAP_ARM_PMU 119 #ifdef KVM_CAP_IRQ_ROUTING @@ -1205,6 +1206,9 @@ struct kvm_s390_ucas_mapping { /* Available with KVM_CAP_X86_SMM */ #define KVM_SMI _IO(KVMIO, 0xb7) +/* Available with KVM_CAP_ARM_PMU */ +#define KVM_ARM_PMU_SET_IRQ _IOW(KVMIO, 0xb8, __u32) + #define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0) #define KVM_DEV_ASSIGN_PCI_2_3 (1 << 1) #define KVM_DEV_ASSIGN_MASK_INTX (1 << 2) diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c index f957b85..57585e1 100644 --- a/virt/kvm/arm/pmu.c +++ b/virt/kvm/arm/pmu.c @@ -381,6 +381,15 @@ void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, unsigned long data, pmc->perf_event = event; } +int kvm_pmu_set_irq_num(struct kvm_vcpu *vcpu, u32 irq) +{ + struct kvm_pmu *pmu = &vcpu->arch.pmu; + + kvm_info("kvm_arm_set_pmu_irq: irq: %u\n", irq); + pmu->irq_num = irq; + return 0; +} + /** * kvm_pmu_init - Initialize global PMU state for per vcpu * @vcpu: The vcpu pointer