From patchwork Mon Jul 27 23:17:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Rutherford X-Patchwork-Id: 6877411 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8D90A9F358 for ; Mon, 27 Jul 2015 23:18:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 64A7C20567 for ; Mon, 27 Jul 2015 23:18:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 235CB2052C for ; Mon, 27 Jul 2015 23:18:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754871AbbG0XSU (ORCPT ); Mon, 27 Jul 2015 19:18:20 -0400 Received: from mail-pd0-f179.google.com ([209.85.192.179]:34460 "EHLO mail-pd0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754815AbbG0XSL (ORCPT ); Mon, 27 Jul 2015 19:18:11 -0400 Received: by pdbbh15 with SMTP id bh15so59416044pdb.1 for ; Mon, 27 Jul 2015 16:18:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:subject:date:message-id:in-reply-to:references; bh=/isdpR2tBOWdoYf1mPZUxc+cmeXjm3ll+1CRubuxoNE=; b=O1FgMEuYzAMCrZ5LQUCVwwNrr3b/0PIaeH2HDXajdTBwg5t8hjTJhx2r4wFgoUUYVh kCGTDoJJJ35lUdCKahXKZqJIzQL8Dx616eTLm/vFndH4ZTnw7ccPpshWZj6AB2zsG7SR 2bGrNV7l5l/L//D9C3LHd9acSpFsJ9m55oVywvxnximhDPMzNsHqvlsCoqeT0FJ2Ae67 rdGGu4gB7q2qR+6FfjAP2YFmovoKZyGn246fBmEATUnXkAxom0t+waAv1Ymjpw78bvH7 gNjdM84cYF2UqCf74ccpaSURYODpwbdgTCroJsH12ox8w0BK4jYmADHDkOwpvNhvXO4u O+Dg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=/isdpR2tBOWdoYf1mPZUxc+cmeXjm3ll+1CRubuxoNE=; b=MiaSWKlWQ4U/Soj7Y7eZRstQDOI4Fg3HUPjGtXX7AblUEYeuebrOGpcDiwFqcftKEp onF8ElqpgxutC5+bpY6lNkA4/Ny6arFw5LRKazdHLW9svVr869NYXo/250fjXpQ++Pg7 PlttBgGrb19rcBQGz/E9ZZCbiZ/EswIZvy2gudzP/spgZa1hSbTpYYl4UlzW2EuwE4gz DMJe5Uh+9/0jwV+cPLqztEi+Z/0Xax1drAT2oFRdqK7oqOLOwqjNX3lwMKCcib1JOqii 8vtz85ljEm0Wtn1m9BR13smSHD/t54/bpsPglw3QdSlTYc7WMXWJ6Nsk/ReDkyT2AIzF SMdA== X-Gm-Message-State: ALoCoQmHNZyRQrZ5aqGMvpaJNkWrZ22xFFCFe4YNaHXB35q8f28tq8ovQMOAIbt6jdpEnkpsYfhd X-Received: by 10.70.91.79 with SMTP id cc15mr73885959pdb.10.1438039091161; Mon, 27 Jul 2015 16:18:11 -0700 (PDT) Received: from entropic.kir.corp.google.com ([172.31.8.128]) by smtp.gmail.com with ESMTPSA id fi7sm31456809pdb.25.2015.07.27.16.18.10 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Jul 2015 16:18:10 -0700 (PDT) From: Steve Rutherford To: kvm@vger.kernel.org Subject: [PATCH v5 3/4] KVM: x86: Add EOI exit bitmap inference Date: Mon, 27 Jul 2015 16:17:41 -0700 Message-Id: <1438039062-3168-3-git-send-email-srutherford@google.com> X-Mailer: git-send-email 2.5.0.rc2.392.g76e840b In-Reply-To: <1438039062-3168-1-git-send-email-srutherford@google.com> References: <1438039062-3168-1-git-send-email-srutherford@google.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In order to support a userspace IOAPIC interacting with an in kernel APIC, the EOI exit bitmaps need to be configurable. If the IOAPIC is in userspace (i.e. the irqchip has been split), the EOI exit bitmaps will be set whenever the GSI Routes are configured. In particular, for the low MSI routes are reservable for userspace IOAPICs. For these MSI routes, the EOI Exit bit corresponding to the destination vector of the route will be set for the destination VCPU. The intention is for the userspace IOAPICs to use the reservable MSI routes to inject interrupts into the guest. This is a slight abuse of the notion of an MSI Route, given that MSIs classically bypass the IOAPIC. It might be worthwhile to add an additional route type to improve clarity. Compile tested for Intel x86. Signed-off-by: Steve Rutherford --- Documentation/virtual/kvm/api.txt | 8 ++++---- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/ioapic.h | 2 ++ arch/x86/kvm/irq_comm.c | 42 +++++++++++++++++++++++++++++++++++++++ arch/x86/kvm/lapic.c | 3 +-- arch/x86/kvm/x86.c | 29 +++++++++++++++++---------- include/linux/kvm_host.h | 20 +++++++++++++++++++ virt/kvm/irqchip.c | 12 ++--------- 8 files changed, 91 insertions(+), 26 deletions(-) diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index 6a13dff..39e4c02 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -3302,10 +3302,10 @@ Valid values for 'type' are: to ignore the request, or to gather VM memory core dump and/or reset/shutdown of the VM. - /* KVM_EXIT_IOAPIC_EOI */ - struct { - __u8 vector; - } eoi; + /* KVM_EXIT_IOAPIC_EOI */ + struct { + __u8 vector; + } eoi; Indicates that the VCPU's in-kernel local APIC received an EOI for a level-triggered IOAPIC interrupt. This exit only triggers when the diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index f1e0103..ebe7f07 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -674,6 +674,7 @@ struct kvm_arch { u64 disabled_quirks; bool irqchip_split; + u8 nr_reserved_ioapic_pins; }; struct kvm_vm_stat { diff --git a/arch/x86/kvm/ioapic.h b/arch/x86/kvm/ioapic.h index d8cc54b..f6ce112 100644 --- a/arch/x86/kvm/ioapic.h +++ b/arch/x86/kvm/ioapic.h @@ -9,6 +9,7 @@ struct kvm; struct kvm_vcpu; #define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS +#define MAX_NR_RESERVED_IOAPIC_PINS 48 #define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */ #define IOAPIC_EDGE_TRIG 0 #define IOAPIC_LEVEL_TRIG 1 @@ -132,4 +133,5 @@ int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state); void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap, u32 *tmr); +void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); #endif diff --git a/arch/x86/kvm/irq_comm.c b/arch/x86/kvm/irq_comm.c index 67f6b62..da4827f 100644 --- a/arch/x86/kvm/irq_comm.c +++ b/arch/x86/kvm/irq_comm.c @@ -335,3 +335,45 @@ int kvm_setup_empty_irq_routing(struct kvm *kvm) { return kvm_set_irq_routing(kvm, empty_routing, 0, 0); } + +void kvm_arch_irq_routing_update(struct kvm *kvm) +{ + if (ioapic_in_kernel(kvm) || !irqchip_in_kernel(kvm)) + return; + kvm_make_scan_ioapic_request(kvm); +} + +void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap) +{ + struct kvm *kvm = vcpu->kvm; + struct kvm_kernel_irq_routing_entry *entry; + struct kvm_irq_routing_table *table; + u32 i, nr_ioapic_pins; + int idx; + + /* kvm->irq_routing must be read after clearing + * KVM_SCAN_IOAPIC. */ + smp_mb(); + idx = srcu_read_lock(&kvm->irq_srcu); + table = kvm->irq_routing; + nr_ioapic_pins = min_t(u32, table->nr_rt_entries, + kvm->arch.nr_reserved_ioapic_pins); + for (i = 0; i < nr_ioapic_pins; ++i) { + hlist_for_each_entry(entry, &table->map[i], link) { + u32 dest_id, dest_mode; + + if (entry->type != KVM_IRQ_ROUTING_MSI) + continue; + dest_id = (entry->msi.address_lo >> 12) & 0xff; + dest_mode = (entry->msi.address_lo >> 2) & 0x1; + if (kvm_apic_match_dest(vcpu, NULL, 0, dest_id, + dest_mode)) { + u32 vector = entry->msi.data & 0xff; + + __set_bit(vector, + (unsigned long *) eoi_exit_bitmap); + } + } + } + srcu_read_unlock(&kvm->irq_srcu, idx); +} diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 37e220d..4dbf6c1 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -209,8 +209,7 @@ out: if (old) kfree_rcu(old, rcu); - if (!irqchip_split(kvm)) - kvm_vcpu_request_scan_ioapic(kvm); + kvm_make_scan_ioapic_request(kvm); } static inline void apic_set_spiv(struct kvm_lapic *apic, u32 val) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 03ba33a..eef562f 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3575,12 +3575,17 @@ static int kvm_vm_ioctl_enable_cap(struct kvm *kvm, if (irqchip_in_kernel(kvm)) goto split_irqchip_unlock; r = -EINVAL; - if (atomic_read(&kvm->online_vcpus)) - goto split_irqchip_unlock; - r = kvm_setup_empty_irq_routing(kvm); - if (r) + if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS) goto split_irqchip_unlock; - kvm->arch.irqchip_split = true; + if (!irqchip_split(kvm)) { + if (atomic_read(&kvm->online_vcpus)) + goto split_irqchip_unlock; + r = kvm_setup_empty_irq_routing(kvm); + if (r) + goto split_irqchip_unlock; + kvm->arch.irqchip_split = true; + } + kvm->arch.nr_reserved_ioapic_pins = cap->args[0]; r = 0; split_irqchip_unlock: mutex_unlock(&kvm->lock); @@ -6164,18 +6169,22 @@ static void process_smi(struct kvm_vcpu *vcpu) static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu) { - u64 eoi_exit_bitmap[4]; + struct kvm *kvm = vcpu->kvm; u32 tmr[8]; if (!kvm_apic_hw_enabled(vcpu->arch.apic)) return; - memset(eoi_exit_bitmap, 0, 32); + memset(vcpu->arch.eoi_exit_bitmaps, 0, 32); memset(tmr, 0, 32); + if (irqchip_split(kvm)) + kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmaps); + else + kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmaps, tmr); + kvm_x86_ops->load_eoi_exitmap(vcpu, vcpu->arch.eoi_exit_bitmaps); - kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr); - kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap); - kvm_apic_update_tmr(vcpu, tmr); + if (!irqchip_split(kvm)) + kvm_apic_update_tmr(vcpu, tmr); } static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu) diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h index 8e12d67..064067e 100644 --- a/include/linux/kvm_host.h +++ b/include/linux/kvm_host.h @@ -329,6 +329,17 @@ struct kvm_kernel_irq_routing_entry { struct hlist_node link; }; +struct kvm_irq_routing_table { + int chip[KVM_NR_IRQCHIPS][KVM_IRQCHIP_NUM_PINS]; + struct kvm_kernel_irq_routing_entry *rt_entries; + u32 nr_rt_entries; + /* + * Array indexed by gsi. Each entry contains list of irq chips + * the gsi is connected to. + */ + struct hlist_head map[0]; +}; + #ifndef KVM_PRIVATE_MEM_SLOTS #define KVM_PRIVATE_MEM_SLOTS 0 #endif @@ -454,10 +465,19 @@ void vcpu_put(struct kvm_vcpu *vcpu); #ifdef __KVM_HAVE_IOAPIC void kvm_vcpu_request_scan_ioapic(struct kvm *kvm); +void kvm_arch_irq_routing_update(struct kvm *kvm); +u8 kvm_arch_nr_userspace_ioapic_pins(struct kvm *kvm); #else static inline void kvm_vcpu_request_scan_ioapic(struct kvm *kvm) { } +static inline void kvm_arch_irq_routing_update(struct kvm *kvm) +{ +} +static inline u8 kvm_arch_nr_userspace_ioapic_pins(struct kvm *kvm) +{ + return 0; +} #endif #ifdef CONFIG_HAVE_KVM_IRQFD diff --git a/virt/kvm/irqchip.c b/virt/kvm/irqchip.c index 21c1424..4f85c6e 100644 --- a/virt/kvm/irqchip.c +++ b/virt/kvm/irqchip.c @@ -31,16 +31,6 @@ #include #include "irq.h" -struct kvm_irq_routing_table { - int chip[KVM_NR_IRQCHIPS][KVM_IRQCHIP_NUM_PINS]; - u32 nr_rt_entries; - /* - * Array indexed by gsi. Each entry contains list of irq chips - * the gsi is connected to. - */ - struct hlist_head map[0]; -}; - int kvm_irq_map_gsi(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *entries, int gsi) { @@ -227,6 +217,8 @@ int kvm_set_irq_routing(struct kvm *kvm, kvm_irq_routing_update(kvm); mutex_unlock(&kvm->irq_lock); + kvm_arch_irq_routing_update(kvm); + synchronize_srcu_expedited(&kvm->irq_srcu); new = old;