From patchwork Tue Nov 10 14:11:20 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 7591221 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BEFC79F2F7 for ; Tue, 10 Nov 2015 14:11:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AA10F2070D for ; Tue, 10 Nov 2015 14:11:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EC899205F7 for ; Tue, 10 Nov 2015 14:11:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752947AbbKJOL3 (ORCPT ); Tue, 10 Nov 2015 09:11:29 -0500 Received: from mail-wm0-f53.google.com ([74.125.82.53]:38806 "EHLO mail-wm0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752100AbbKJOL2 (ORCPT ); Tue, 10 Nov 2015 09:11:28 -0500 Received: by wmec201 with SMTP id c201so2588297wme.1 for ; Tue, 10 Nov 2015 06:11:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro_org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=dq86JELjmpCpLHUoeci5R74YMcdx3oH9t1Rg9xJjHlI=; b=N16uST9LXo0r6Q6O/kuoV35sSC7yfOvAWtkxav2VkBzzJKy0WYaGBVRRCErFrJTlAB v4KtbdXl7Un8lnE5E12Hy+FdRwrL/TjTNeBsglWDfoe99v/irfWHtEKqE5VpooEV4kux XpCSYRmj8DkewjXrFHdfdX9NiVriwg0+Mx0UqbmdyXVieabfC9A94mmRXmHEiofXaeuQ sbWAxSjcJ/eBGuXAYMhAvPppAnGDtwsQE6M25VIZ0bQ5TAs5ud7wXnCGCmENGJNb6+DI L3Vv613JUamjKWTJIzt8kAW2bhUL+PSvvnRIsjskNYddUx7JkjPxGoXOMEv9iu6t7zod cenA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=dq86JELjmpCpLHUoeci5R74YMcdx3oH9t1Rg9xJjHlI=; b=iUdYdC4Eprzz+qPevKk7y1SZxPbsKQGCw0UfeaDYLiENLOdeacwJez1IE8iAj/q7wi Wkepw9S4MqHwA92g+FRa+qmE2Am3ay35Cab9d5oUjM1ldOLzr4mMzgFXBED6ofdt1iOo pdIowOcd2d+niOuMw9GCjVIyqGif2GR16GIDb35tM+dOfElXj+MIAVkb4+k6bJwNdaje qapSuVgEEdnRGDQ8Fn75fXjeSyiU95j/i0TiaO8KGgQwBcjIZoqbltU0HUiOeAjjOjMl 4hM/IhCUdB/prE/naUTRost+CWlkN4hcCcnpRv2XOoh49kBwQR0PqyodGUH5rLHEAMP9 quVA== X-Gm-Message-State: ALoCoQm5KN6BVe/j+LqgaxmGoie3RezIvd4FVTKuPMpyhlF8PIXCGRD04mn+aJfWynZ1jz92Knm9 X-Received: by 10.194.143.82 with SMTP id sc18mr2145495wjb.82.1447164686738; Tue, 10 Nov 2015 06:11:26 -0800 (PST) Received: from localhost.localdomain ([2.44.134.145]) by smtp.gmail.com with ESMTPSA id he3sm3698995wjc.48.2015.11.10.06.11.24 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 10 Nov 2015 06:11:26 -0800 (PST) From: Ard Biesheuvel To: christoffer.dall@linaro.org, marc.zyngier@arm.com, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: p.fedin@samsung.com, Ard Biesheuvel Subject: [PATCH v2 resend] ARM/arm64: KVM: test properly for a PTE's uncachedness Date: Tue, 10 Nov 2015 15:11:20 +0100 Message-Id: <1447164680-16330-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.9.1 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The open coded tests for checking whether a PTE maps a page as uncached use a flawed '(pte_val(xxx) & CONST) != CONST' pattern, which is not guaranteed to work since the type of a mapping is not a set of mutually exclusive bits For HYP mappings, the type is an index into the MAIR table (i.e, the index itself does not contain any information whatsoever about the type of the mapping), and for stage-2 mappings it is a bit field where normal memory and device types are defined as follows: #define MT_S2_NORMAL 0xf #define MT_S2_DEVICE_nGnRE 0x1 I.e., masking *and* comparing with the latter matches on the former, and we have been getting lucky merely because the S2 device mappings also have the PTE_UXN bit set, or we would misidentify memory mappings as device mappings. Since the unmap_range() code path (which contains one instance of the flawed test) is used both for HYP mappings and stage-2 mappings, and considering the difference between the two, it is non-trivial to fix this by rewriting the tests in place, as it would involve passing down the type of mapping through all the functions. However, since HYP mappings and stage-2 mappings both deal with host physical addresses, we can simply check whether the mapping is backed by memory that is managed by the host kernel, and only perform the D-cache maintenance if this is the case. Signed-off-by: Ard Biesheuvel Tested-by: Pavel Fedin Reviewed-by: Christoffer Dall --- Resending since I failed to cc the lists the first time around, only difference is the added tags. arch/arm/kvm/mmu.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c index 6984342da13d..7dace909d5cf 100644 --- a/arch/arm/kvm/mmu.c +++ b/arch/arm/kvm/mmu.c @@ -98,6 +98,11 @@ static void kvm_flush_dcache_pud(pud_t pud) __kvm_flush_dcache_pud(pud); } +static bool kvm_is_device_pfn(unsigned long pfn) +{ + return !pfn_valid(pfn); +} + /** * stage2_dissolve_pmd() - clear and flush huge PMD entry * @kvm: pointer to kvm structure. @@ -213,7 +218,7 @@ static void unmap_ptes(struct kvm *kvm, pmd_t *pmd, kvm_tlb_flush_vmid_ipa(kvm, addr); /* No need to invalidate the cache for device mappings */ - if ((pte_val(old_pte) & PAGE_S2_DEVICE) != PAGE_S2_DEVICE) + if (!kvm_is_device_pfn(__phys_to_pfn(addr))) kvm_flush_dcache_pte(old_pte); put_page(virt_to_page(pte)); @@ -305,8 +310,7 @@ static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd, pte = pte_offset_kernel(pmd, addr); do { - if (!pte_none(*pte) && - (pte_val(*pte) & PAGE_S2_DEVICE) != PAGE_S2_DEVICE) + if (!pte_none(*pte) && !kvm_is_device_pfn(__phys_to_pfn(addr))) kvm_flush_dcache_pte(*pte); } while (pte++, addr += PAGE_SIZE, addr != end); } @@ -1037,11 +1041,6 @@ static bool kvm_is_write_fault(struct kvm_vcpu *vcpu) return kvm_vcpu_dabt_iswrite(vcpu); } -static bool kvm_is_device_pfn(unsigned long pfn) -{ - return !pfn_valid(pfn); -} - /** * stage2_wp_ptes - write protect PMD range * @pmd: pointer to pmd entry