From patchwork Tue Nov 17 05:20:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haozhong Zhang X-Patchwork-Id: 7632941 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0DE229F1C2 for ; Tue, 17 Nov 2015 05:21:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0E0E1204D1 for ; Tue, 17 Nov 2015 05:21:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EB09B204D3 for ; Tue, 17 Nov 2015 05:21:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752096AbbKQFVI (ORCPT ); Tue, 17 Nov 2015 00:21:08 -0500 Received: from mga14.intel.com ([192.55.52.115]:3601 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751634AbbKQFVG (ORCPT ); Tue, 17 Nov 2015 00:21:06 -0500 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP; 16 Nov 2015 21:21:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,306,1444719600"; d="scan'208";a="840264299" Received: from hzzhang-optiplex-9020.sh.intel.com (HELO localhost) ([10.239.12.31]) by fmsmga001.fm.intel.com with ESMTP; 16 Nov 2015 21:21:04 -0800 From: Haozhong Zhang To: , Eduardo Habkost , "Dr. David Alan Gilbert" Cc: Paolo Bonzini , Richard Henderson , "Michael S. Tsirkin" , , Marcelo Tosatti , kvm@vger.kernel.org, Haozhong Zhang Subject: [PATCH v5 3/3] target-i386: add support to migrate vcpu's TSC rate Date: Tue, 17 Nov 2015 13:20:39 +0800 Message-Id: <1447737639-6139-4-git-send-email-haozhong.zhang@intel.com> X-Mailer: git-send-email 2.4.8 In-Reply-To: <1447737639-6139-1-git-send-email-haozhong.zhang@intel.com> References: <1447737639-6139-1-git-send-email-haozhong.zhang@intel.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch enables migrating vcpu's TSC rate. If KVM on the destination machine supports TSC scaling, guest programs will observe a consistent TSC rate across the migration. If TSC scaling is not supported on the destination machine, the migration will not be aborted and QEMU on the destination will not set vcpu's TSC rate to the migrated value. If vcpu's TSC rate specified by CPU option 'tsc-freq' on the destination machine is inconsistent with the migrated TSC rate, the migration will be aborted. For backwards compatibility, the migration of vcpu's TSC rate is disabled on pc-*-2.4 and older machine types. Signed-off-by: Haozhong Zhang --- hw/i386/pc.c | 1 + hw/i386/pc_piix.c | 1 + hw/i386/pc_q35.c | 1 + include/hw/i386/pc.h | 1 + target-i386/cpu.c | 2 +- target-i386/cpu.h | 1 + target-i386/kvm.c | 4 ++++ target-i386/machine.c | 28 ++++++++++++++++++++++++++++ 8 files changed, 38 insertions(+), 1 deletion(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 0cb8afd..2f2fc93 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1952,6 +1952,7 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); pcmc->get_hotplug_handler = mc->get_hotplug_handler; + pcmc->save_tsc_khz = true; mc->get_hotplug_handler = pc_get_hotpug_handler; mc->cpu_index_to_socket_id = pc_cpu_index_to_socket_id; mc->default_boot_order = "cad"; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 07d0baa..7c5b0d2 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -489,6 +489,7 @@ static void pc_i440fx_2_4_machine_options(MachineClass *m) m->alias = NULL; m->is_default = 0; pcmc->broken_reserved_end = true; + pcmc->save_tsc_khz = false; SET_MACHINE_COMPAT(m, PC_COMPAT_2_4); } diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 0fdae09..fd8efe3 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -387,6 +387,7 @@ static void pc_q35_2_4_machine_options(MachineClass *m) m->hw_version = "2.4.0"; m->alias = NULL; pcmc->broken_reserved_end = true; + pcmc->save_tsc_khz = false; SET_MACHINE_COMPAT(m, PC_COMPAT_2_4); } diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 4bbc0ff..fea0f28 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -60,6 +60,7 @@ struct PCMachineClass { /*< public >*/ bool broken_reserved_end; + bool save_tsc_khz; HotplugHandler *(*get_hotplug_handler)(MachineState *machine, DeviceState *dev); }; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index e5f1c5b..98c6a4c 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1724,7 +1724,7 @@ static void x86_cpuid_set_tsc_freq(Object *obj, Visitor *v, void *opaque, return; } - cpu->env.tsc_khz = value / 1000; + cpu->env.tsc_khz = cpu->env.user_tsc_khz = value / 1000; } static void x86_cpuid_get_apic_id(Object *obj, Visitor *v, void *opaque, diff --git a/target-i386/cpu.h b/target-i386/cpu.h index fc4a605..ffe0bce 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -973,6 +973,7 @@ typedef struct CPUX86State { uint32_t sipi_vector; bool tsc_valid; int64_t tsc_khz; + int64_t user_tsc_khz; /* for sanity check only */ void *kvm_xsave_buf; uint64_t mcg_cap; diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 6a1acb4..6856899 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -2384,6 +2384,10 @@ int kvm_arch_put_registers(CPUState *cpu, int level) } } + if (level == KVM_PUT_FULL_STATE) { + kvm_arch_set_tsc_khz(cpu); + } + ret = kvm_getput_regs(x86_cpu, 1); if (ret < 0) { return ret; diff --git a/target-i386/machine.c b/target-i386/machine.c index a18e16e..3c5d24b 100644 --- a/target-i386/machine.c +++ b/target-i386/machine.c @@ -331,6 +331,13 @@ static int cpu_post_load(void *opaque, int version_id) CPUX86State *env = &cpu->env; int i; + if (env->tsc_khz && env->user_tsc_khz && + env->tsc_khz != env->user_tsc_khz) { + fprintf(stderr, "Mismatch between user-specified TSC frequency and " + "migrated TSC frequency\n"); + return -1; + } + /* * Real mode guest segments register DPL should be zero. * Older KVM version were setting it wrongly. @@ -775,6 +782,26 @@ static const VMStateDescription vmstate_xss = { } }; +static bool tsc_khz_needed(void *opaque) +{ + X86CPU *cpu = opaque; + CPUX86State *env = &cpu->env; + MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine()); + PCMachineClass *pcmc = PC_MACHINE_CLASS(mc); + return env->tsc_khz && pcmc->save_tsc_khz; +} + +static const VMStateDescription vmstate_tsc_khz = { + .name = "cpu/tsc_khz", + .version_id = 1, + .minimum_version_id = 1, + .needed = tsc_khz_needed, + .fields = (VMStateField[]) { + VMSTATE_INT64(env.tsc_khz, X86CPU), + VMSTATE_END_OF_LIST() + } +}; + VMStateDescription vmstate_x86_cpu = { .name = "cpu", .version_id = 12, @@ -895,6 +922,7 @@ VMStateDescription vmstate_x86_cpu = { &vmstate_msr_hyperv_runtime, &vmstate_avx512, &vmstate_xss, + &vmstate_tsc_khz, NULL } };