From patchwork Mon Oct 17 07:45:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Wanpeng Li X-Patchwork-Id: 9378477 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 117E96075E for ; Mon, 17 Oct 2016 07:46:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0601828F3F for ; Mon, 17 Oct 2016 07:46:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EB73E28F41; Mon, 17 Oct 2016 07:46:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 442F228F8B for ; Mon, 17 Oct 2016 07:46:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932545AbcJQHpz (ORCPT ); Mon, 17 Oct 2016 03:45:55 -0400 Received: from mail-pa0-f65.google.com ([209.85.220.65]:34474 "EHLO mail-pa0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932466AbcJQHpY (ORCPT ); Mon, 17 Oct 2016 03:45:24 -0400 Received: by mail-pa0-f65.google.com with SMTP id fn2so8035617pad.1; Mon, 17 Oct 2016 00:45:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HplDsY8dZ6Px8S7Ssth8hW51Ak8SVFW7CYu50lM4mgY=; b=cCArcK5CgOGuLuFOIyvZOTVZ/Gm+Gdu5k3ZPLDaXuok4nI46pQEXd4QNiBd8NjcuQS lZ1HMaXIQKyKGiqJdweup3fpcuZR8ysuw2OJ2pMmEHoiAjrcnyYdlhTlju9QdtqG7rYY Hxc/WWb9MGN7UMrG/7a7ssSLTXhHszXfh93StZI7lSgRRYrfKnAqX4xIP6mYDRaRYjii bsWvbe+qpfrFF2Pxp2MlHKDETmrGMs13S1B8sT/xxwTUpVI7SZKh9EBZQGtMsS2RTa3c 2G2he2txHzuikH+tunVhgJ7g+Luax9tke0PySMnCd+2b8l8wej/UHpdzmzW+xCoGRJzZ labw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HplDsY8dZ6Px8S7Ssth8hW51Ak8SVFW7CYu50lM4mgY=; b=PXc90r7AFj9nEQj0sioyuJZ81ci4KFmp348WZ+gnaeXUyO5lfc0qm+ZCqQbnuqsvjy bT4/FbZII1oCt5lffbW0tDEUZcg9AFf1rFnA8KBobYZ7k3GmojevM0LbBV9o58tVEmen 8RPUHe55qSFQKXB1AbcYK51bAVCJ0Z+m9PXrU45XKUyqL0AkC67eDljHMALqVpBZBvDR Iqc1bjqE8P7eqSWfgk6MXuyfpR7KzPKK7cC5YBqcpnCZYaSjqzE+QgK6SDro0KB/Zq2e Vy90xieRVDJ+ujbAa9JUXdy3X9st2apyGNW6WFM7hEV3IK4mC8n11usSGanGOo4qFmVc hL1Q== X-Gm-Message-State: AA6/9RkacdB4/exkjLLwZB7v+zRAzOb4A2aINHxJXtzl6cqNm8pUFCqviKxrTA0oKZw/sw== X-Received: by 10.66.159.200 with SMTP id xe8mr29916253pab.21.1476690323415; Mon, 17 Oct 2016 00:45:23 -0700 (PDT) Received: from kernel.kingsoft.cn ([114.255.44.132]) by smtp.gmail.com with ESMTPSA id ym3sm8384409pac.42.2016.10.17.00.45.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 17 Oct 2016 00:45:22 -0700 (PDT) From: Wanpeng Li X-Google-Original-From: Wanpeng Li To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , Yunhong Jiang , Wanpeng Li Subject: [PATCH 5/5] KVM: LAPIC: add APIC Timer periodic/oneshot mode VMX preemption timer support Date: Mon, 17 Oct 2016 15:45:02 +0800 Message-Id: <1476690302-22158-6-git-send-email-wanpeng.li@hotmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1476690302-22158-1-git-send-email-wanpeng.li@hotmail.com> References: <1476690302-22158-1-git-send-email-wanpeng.li@hotmail.com> MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Wanpeng Li Most windows guests still utilize APIC Timer periodic/oneshot mode instead of tsc-deadline mode, and the APIC Timer periodic/oneshot mode are still emulated by high overhead hrtimer on host. This patch converts the expected expire time of the periodic/oneshot mode to guest deadline tsc in order to leverage VMX preemption timer logic for APIC Timer tsc-deadline mode. After each preemption timer vmexit preemption timer is restarted to emulate LVTT current-count register is automatically reloaded from the initial-count register when the count reaches 0. This patch reduces ~3800 cycles for each APIC Timer periodic mode operation virtualization. Cc: Paolo Bonzini Cc: Radim Krčmář Cc: Yunhong Jiang Signed-off-by: Wanpeng Li --- arch/x86/kvm/lapic.c | 103 ++++++++++++++++++++++++++++++++++++--------------- arch/x86/kvm/lapic.h | 1 + 2 files changed, 75 insertions(+), 29 deletions(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 0354a79..4e77d37 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1090,7 +1090,7 @@ static void apic_send_ipi(struct kvm_lapic *apic) static u32 apic_get_tmcct(struct kvm_lapic *apic) { - ktime_t remaining; + ktime_t remaining, now; s64 ns; u32 tmcct; @@ -1101,7 +1101,8 @@ static u32 apic_get_tmcct(struct kvm_lapic *apic) apic->lapic_timer.period == 0) return 0; - remaining = hrtimer_get_remaining(&apic->lapic_timer.timer); + now = apic->lapic_timer.timer.base->get_time(); + remaining = ktime_sub(apic->lapic_timer.target_expiration, now); if (ktime_to_ns(remaining) < 0) remaining = ktime_set(0, 0); @@ -1351,13 +1352,28 @@ static void start_sw_period(struct kvm_lapic *apic) { ktime_t now; - /* lapic timer in oneshot or periodic mode */ + now = apic->lapic_timer.timer.base->get_time(); + + if (likely(ktime_compare(apic->lapic_timer.target_expiration, now))) + hrtimer_start(&apic->lapic_timer.timer, + apic->lapic_timer.target_expiration, + HRTIMER_MODE_ABS_PINNED); + else + apic_timer_expired(apic); +} + +static bool set_target_expiration(struct kvm_lapic *apic) +{ + ktime_t now; + u64 tscl = rdtsc(); + now = apic->lapic_timer.timer.base->get_time(); apic->lapic_timer.period = (u64)kvm_lapic_get_reg(apic, APIC_TMICT) - * APIC_BUS_CYCLE_NS * apic->divide_count; + * APIC_BUS_CYCLE_NS * apic->divide_count; if (!apic->lapic_timer.period) - return; + return false; + /* * Do not allow the guest to program periodic timers with small * interval, since the hrtimers are not throttled by the host @@ -1376,10 +1392,6 @@ static void start_sw_period(struct kvm_lapic *apic) } } - hrtimer_start(&apic->lapic_timer.timer, - ktime_add_ns(now, apic->lapic_timer.period), - HRTIMER_MODE_ABS_PINNED); - apic_debug("%s: bus cycle is %" PRId64 "ns, now 0x%016" PRIx64 ", " "timer initial count 0x%x, period %lldns, " @@ -1389,6 +1401,12 @@ static void start_sw_period(struct kvm_lapic *apic) apic->lapic_timer.period, ktime_to_ns(ktime_add_ns(now, apic->lapic_timer.period))); + + apic->lapic_timer.tscdeadline = kvm_read_l1_tsc(apic->vcpu, tscl) + + nsec_to_cycles(apic->vcpu, apic->lapic_timer.period); + apic->lapic_timer.target_expiration = ktime_add_ns(now, apic->lapic_timer.period); + + return true; } bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu *vcpu) @@ -1406,22 +1424,12 @@ static void cancel_hv_timer(struct kvm_lapic *apic) apic->lapic_timer.hv_timer_in_use = false; } -void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu) -{ - struct kvm_lapic *apic = vcpu->arch.apic; - - WARN_ON(!apic->lapic_timer.hv_timer_in_use); - WARN_ON(swait_active(&vcpu->wq)); - cancel_hv_timer(apic); - apic_timer_expired(apic); -} -EXPORT_SYMBOL_GPL(kvm_lapic_expired_hv_timer); - static bool start_hv_timer(struct kvm_lapic *apic) { u64 tscdeadline = apic->lapic_timer.tscdeadline; - if (atomic_read(&apic->lapic_timer.pending) || + if ((atomic_read(&apic->lapic_timer.pending) && + !apic_lvtt_period(apic)) || kvm_x86_ops->set_hv_timer(apic->vcpu, tscdeadline)) { if (apic->lapic_timer.hv_timer_in_use) cancel_hv_timer(apic); @@ -1430,7 +1438,8 @@ static bool start_hv_timer(struct kvm_lapic *apic) hrtimer_cancel(&apic->lapic_timer.timer); /* In case the sw timer triggered in the window */ - if (atomic_read(&apic->lapic_timer.pending)) + if (atomic_read(&apic->lapic_timer.pending) && + !apic_lvtt_period(apic)) cancel_hv_timer(apic); } trace_kvm_hv_timer_state(apic->vcpu->vcpu_id, @@ -1438,14 +1447,42 @@ static bool start_hv_timer(struct kvm_lapic *apic) return apic->lapic_timer.hv_timer_in_use; } +void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu) +{ + struct kvm_lapic *apic = vcpu->arch.apic; + + WARN_ON(!apic->lapic_timer.hv_timer_in_use); + WARN_ON(swait_active(&vcpu->wq)); + cancel_hv_timer(apic); + apic_timer_expired(apic); + + if (apic_lvtt_period(apic) && + set_target_expiration(apic) && + !start_hv_timer(apic)) + start_sw_period(apic); +} +EXPORT_SYMBOL_GPL(kvm_lapic_expired_hv_timer); + void kvm_lapic_switch_to_hv_timer(struct kvm_vcpu *vcpu) { struct kvm_lapic *apic = vcpu->arch.apic; WARN_ON(apic->lapic_timer.hv_timer_in_use); - if (apic_lvtt_tscdeadline(apic)) - start_hv_timer(apic); + if (apic_lvtt_period(apic) || apic_lvtt_oneshot(apic)) { + ktime_t remaining, now; + u64 tscl = rdtsc(); + + now = apic->lapic_timer.timer.base->get_time(); + remaining = hrtimer_get_remaining(&apic->lapic_timer.timer); + if (ktime_to_ns(remaining) < 0) + remaining = ktime_set(0, 0); + + apic->lapic_timer.tscdeadline = kvm_read_l1_tsc(apic->vcpu, tscl) + + nsec_to_cycles(apic->vcpu, ktime_to_ns(remaining)); + apic->lapic_timer.target_expiration = ktime_add_ns(now, ktime_to_ns(remaining)); + } + start_hv_timer(apic); } EXPORT_SYMBOL_GPL(kvm_lapic_switch_to_hv_timer); @@ -1462,7 +1499,10 @@ void kvm_lapic_switch_to_sw_timer(struct kvm_vcpu *vcpu) if (atomic_read(&apic->lapic_timer.pending)) return; - start_sw_tscdeadline(apic); + if (apic_lvtt_period(apic) || apic_lvtt_oneshot(apic)) + start_sw_period(apic); + else if (apic_lvtt_tscdeadline(apic)) + start_sw_tscdeadline(apic); } EXPORT_SYMBOL_GPL(kvm_lapic_switch_to_sw_timer); @@ -1470,9 +1510,11 @@ static void start_apic_timer(struct kvm_lapic *apic) { atomic_set(&apic->lapic_timer.pending, 0); - if (apic_lvtt_period(apic) || apic_lvtt_oneshot(apic)) - start_sw_period(apic); - else if (apic_lvtt_tscdeadline(apic)) { + if (apic_lvtt_period(apic) || apic_lvtt_oneshot(apic)) { + if (set_target_expiration(apic) && + !(kvm_x86_ops->set_hv_timer && start_hv_timer(apic))) + start_sw_period(apic); + } else if (apic_lvtt_tscdeadline(apic)) { if (!(kvm_x86_ops->set_hv_timer && start_hv_timer(apic))) start_sw_tscdeadline(apic); } @@ -2005,8 +2047,11 @@ void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu) if (atomic_read(&apic->lapic_timer.pending) > 0) { kvm_apic_local_deliver(apic, APIC_LVTT); - if (apic_lvtt_tscdeadline(apic)) + if (!(apic_lvtt_period(apic) && + kvm_lapic_hv_timer_in_use(vcpu))) { apic->lapic_timer.tscdeadline = 0; + apic->lapic_timer.target_expiration = ktime_set(0, 0); + } atomic_set(&apic->lapic_timer.pending, 0); } } diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h index 031db26..e0c8023 100644 --- a/arch/x86/kvm/lapic.h +++ b/arch/x86/kvm/lapic.h @@ -15,6 +15,7 @@ struct kvm_timer { struct hrtimer timer; s64 period; /* unit: ns */ + ktime_t target_expiration; u32 timer_mode; u32 timer_mode_mask; u64 tscdeadline;