From patchwork Wed Nov 2 22:22:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Huang X-Patchwork-Id: 9409973 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4610C60722 for ; Wed, 2 Nov 2016 22:22:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 383F82A5BC for ; Wed, 2 Nov 2016 22:22:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2CE782A5DF; Wed, 2 Nov 2016 22:22:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B9A022A5DF for ; Wed, 2 Nov 2016 22:22:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933197AbcKBWWW (ORCPT ); Wed, 2 Nov 2016 18:22:22 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59842 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933178AbcKBWWV (ORCPT ); Wed, 2 Nov 2016 18:22:21 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id F3E82C04B30E; Wed, 2 Nov 2016 22:22:20 +0000 (UTC) Received: from weilaptop.redhat.com (unused [10.10.50.104] (may be forged)) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id uA2MMHAP001149; Wed, 2 Nov 2016 18:22:19 -0400 From: Wei Huang To: cov@codeaurora.org Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, shannon.zhao@linaro.org, alistair.francis@xilinx.com, croberts@codeaurora.org, alindsay@codeaurora.org, drjones@redhat.com Subject: [kvm-unit-tests PATCHv7 1/3] arm: Add PMU test Date: Wed, 2 Nov 2016 17:22:15 -0500 Message-Id: <1478125337-11770-2-git-send-email-wei@redhat.com> In-Reply-To: <1478125337-11770-1-git-send-email-wei@redhat.com> References: <1478125337-11770-1-git-send-email-wei@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Wed, 02 Nov 2016 22:22:21 +0000 (UTC) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Beginning with a simple sanity check of the control register, add a unit test for the ARM Performance Monitors Unit (PMU). Signed-off-by: Christopher Covington --- arm/Makefile.common | 3 +- arm/pmu.c | 82 +++++++++++++++++++++++++++++++++++++++++++++++++++++ arm/unittests.cfg | 20 +++++++++++++ 3 files changed, 104 insertions(+), 1 deletion(-) create mode 100644 arm/pmu.c diff --git a/arm/Makefile.common b/arm/Makefile.common index ccb554d..f98f422 100644 --- a/arm/Makefile.common +++ b/arm/Makefile.common @@ -11,7 +11,8 @@ endif tests-common = \ $(TEST_DIR)/selftest.flat \ - $(TEST_DIR)/spinlock-test.flat + $(TEST_DIR)/spinlock-test.flat \ + $(TEST_DIR)/pmu.flat all: test_cases diff --git a/arm/pmu.c b/arm/pmu.c new file mode 100644 index 0000000..42d0ee1 --- /dev/null +++ b/arm/pmu.c @@ -0,0 +1,82 @@ +/* + * Test the ARM Performance Monitors Unit (PMU). + * + * Copyright 2015 The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU Lesser General Public License version 2.1 and + * only version 2.1 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License + * for more details. + */ +#include "libcflat.h" + +#if defined(__arm__) +static inline uint32_t get_pmcr(void) +{ + uint32_t ret; + + asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (ret)); + return ret; +} +#elif defined(__aarch64__) +static inline uint32_t get_pmcr(void) +{ + uint32_t ret; + + asm volatile("mrs %0, pmcr_el0" : "=r" (ret)); + return ret; +} +#endif + +struct pmu_data { + union { + uint32_t pmcr_el0; + struct { + uint32_t enable:1; + uint32_t event_counter_reset:1; + uint32_t cycle_counter_reset:1; + uint32_t cycle_counter_clock_divider:1; + uint32_t event_counter_export:1; + uint32_t cycle_counter_disable_when_prohibited:1; + uint32_t cycle_counter_long:1; + uint32_t reserved:4; + uint32_t counters:5; + uint32_t identification_code:8; + uint32_t implementer:8; + }; + }; +}; + +/* + * As a simple sanity check on the PMCR_EL0, ensure the implementer field isn't + * null. Also print out a couple other interesting fields for diagnostic + * purposes. For example, as of fall 2015, QEMU TCG mode doesn't implement + * event counters and therefore reports zero event counters, but hopefully + * support for at least the instructions event will be added in the future and + * the reported number of event counters will become nonzero. + */ +static bool check_pmcr(void) +{ + struct pmu_data pmu; + + pmu.pmcr_el0 = get_pmcr(); + + printf("PMU implementer: %c\n", pmu.implementer); + printf("Identification code: 0x%x\n", pmu.identification_code); + printf("Event counters: %d\n", pmu.counters); + + return pmu.implementer != 0; +} + +int main(void) +{ + report_prefix_push("pmu"); + + report("Control register", check_pmcr()); + + return report_summary(); +} diff --git a/arm/unittests.cfg b/arm/unittests.cfg index 3f6fa45..b647b69 100644 --- a/arm/unittests.cfg +++ b/arm/unittests.cfg @@ -54,3 +54,23 @@ file = selftest.flat smp = $MAX_SMP extra_params = -append 'smp' groups = selftest + +# Test PMU support (KVM) +[pmu-kvm] +file = pmu.flat +groups = pmu +accel = kvm + +# Test PMU support (TCG) with -icount IPC=1 +[pmu-tcg-icount-1] +file = pmu.flat +extra_params = -icount 0 -append '1' +groups = pmu +accel = tcg + +# Test PMU support (TCG) with -icount IPC=256 +[pmu-tcg-icount-256] +file = pmu.flat +extra_params = -icount 8 -append '256' +groups = pmu +accel = tcg