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Sun, 08 Jan 2017 22:26:11 -0800 (PST) Received: from jintack.cs.columbia.edu ([2001:18d8:ffff:16:21a:4aff:feaa:f900]) by smtp.gmail.com with ESMTPSA id h3sm8623257qtc.6.2017.01.08.22.26.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 08 Jan 2017 22:26:11 -0800 (PST) From: Jintack Lim To: christoffer.dall@linaro.org, marc.zyngier@arm.com, pbonzini@redhat.com, rkrcmar@redhat.com, linux@armlinux.org.uk, catalin.marinas@arm.com, will.deacon@arm.com, vladimir.murzin@arm.com, suzuki.poulose@arm.com, mark.rutland@arm.com, james.morse@arm.com, lorenzo.pieralisi@arm.com, kevin.brodsky@arm.com, wcohen@redhat.com, shankerd@codeaurora.org, geoff@infradead.org, andre.przywara@arm.com, eric.auger@redhat.com, anna-maria@linutronix.de, shihwei@cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: jintack@cs.columbia.edu Subject: [RFC 31/55] KVM: arm/arm64: Inject maintenance interrupts to the guest hypervisor Date: Mon, 9 Jan 2017 01:24:27 -0500 Message-Id: <1483943091-1364-32-git-send-email-jintack@cs.columbia.edu> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1483943091-1364-1-git-send-email-jintack@cs.columbia.edu> References: <1483943091-1364-1-git-send-email-jintack@cs.columbia.edu> X-No-Spam-Score: Local X-Scanned-By: MIMEDefang 2.78 on 128.59.72.14 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Christoffer Dall If we exit a nested VM with a pending maintenance interrupt from the GIC, then we need to forward this to the guest hypervisor so that it can re-sync the appropriate LRs and sample level triggered interrupts again. Signed-off-by: Christoffer Dall Signed-off-by: Jintack Lim --- arch/arm64/kvm/context.c | 3 +++ include/kvm/arm_vgic.h | 2 ++ virt/kvm/arm/vgic/vgic-v2-nested.c | 16 ++++++++++++++++ 3 files changed, 21 insertions(+) diff --git a/arch/arm64/kvm/context.c b/arch/arm64/kvm/context.c index 7a94c9d..a93ffe4 100644 --- a/arch/arm64/kvm/context.c +++ b/arch/arm64/kvm/context.c @@ -140,6 +140,9 @@ static void sync_shadow_el1_state(struct kvm_vcpu *vcpu, bool setup) void kvm_arm_setup_shadow_state(struct kvm_vcpu *vcpu) { struct kvm_cpu_context *ctxt = &vcpu->arch.ctxt; + + vgic_handle_nested_maint_irq(vcpu); + if (unlikely(vcpu_mode_el2(vcpu))) { ctxt->hw_pstate = *vcpu_cpsr(vcpu) & ~PSR_MODE_MASK; diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h index 484f6b1..fc882d6 100644 --- a/include/kvm/arm_vgic.h +++ b/include/kvm/arm_vgic.h @@ -315,9 +315,11 @@ int kvm_vgic_inject_mapped_irq(struct kvm *kvm, int cpuid, unsigned int intid, #ifdef CONFIG_KVM_ARM_NESTED_HYP void vgic_v2_setup_shadow_state(struct kvm_vcpu *vcpu); void vgic_v2_restore_shadow_state(struct kvm_vcpu *vcpu); +void vgic_handle_nested_maint_irq(struct kvm_vcpu *vcpu); #else static inline void vgic_v2_setup_shadow_state(struct kvm_vcpu *vcpu) { } static inline void vgic_v2_restore_shadow_state(struct kvm_vcpu *vcpu) { } +static inline void vgic_handle_nested_maint_irq(struct kvm_vcpu *vcpu) { } #endif #define irqchip_in_kernel(k) (!!((k)->arch.vgic.in_kernel)) diff --git a/virt/kvm/arm/vgic/vgic-v2-nested.c b/virt/kvm/arm/vgic/vgic-v2-nested.c index a992da5..85f646b 100644 --- a/virt/kvm/arm/vgic/vgic-v2-nested.c +++ b/virt/kvm/arm/vgic/vgic-v2-nested.c @@ -300,6 +300,22 @@ void vgic_v2_restore_shadow_state(struct kvm_vcpu *vcpu) vgic_cpu->nested_vgic_v2 = vgic_cpu->shadow_vgic_v2; } +void vgic_handle_nested_maint_irq(struct kvm_vcpu *vcpu) +{ + struct vgic_v2_cpu_if *cpu_if = vcpu_nested_if(vcpu); + + /* + * If we exit a nested VM with a pending maintenance interrupt from the + * GIC, then we need to forward this to the guest hypervisor so that it + * can re-sync the appropriate LRs and sample level triggered interrupts + * again. + */ + if (vcpu_el2_imo_is_set(vcpu) && !vcpu_mode_el2(vcpu) && + (cpu_if->vgic_hcr & GICH_HCR_EN) && + vgic_mmio_read_v2_misr(vcpu, 0, 0)) + kvm_inject_nested_irq(vcpu); +} + void vgic_init_nested(struct kvm_vcpu *vcpu) { vgic_v2_setup_shadow_state(vcpu);