From patchwork Tue Mar 28 19:30:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tyler Baicar X-Patchwork-Id: 9650409 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E0AF260349 for ; Tue, 28 Mar 2017 19:33:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E0CB9283C9 for ; Tue, 28 Mar 2017 19:33:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D4D1928405; Tue, 28 Mar 2017 19:33:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 76C862839C for ; Tue, 28 Mar 2017 19:33:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932631AbdC1Tcq (ORCPT ); Tue, 28 Mar 2017 15:32:46 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:46862 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932299AbdC1Tcc (ORCPT ); Tue, 28 Mar 2017 15:32:32 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id BDE3260F68; Tue, 28 Mar 2017 19:31:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1490729507; bh=LvonReDniYJ4plK0A91m30vgShpSWCOBtatHQB9jhdM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=J97pGICpH+GttJK1VmF0QdPlr3/wuxpoHn2XsyU81+WoDSiUo7Ar6bLBOadfVYyim vQYg2sgj/tyO8llACb7gj9oNPzEwW810S5uHAvqDJdRW+8KkMJqE9YAuk/i8gmAMy2 uBP9k6ecDcLKE6opm095c2G18sIHLEJHzZK2tnws= Received: from tbaicar-lnx.qualcomm.com (unknown [129.46.14.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: tbaicar@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 0C79960FB1; Tue, 28 Mar 2017 19:31:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1490729505; bh=LvonReDniYJ4plK0A91m30vgShpSWCOBtatHQB9jhdM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=g3pJAZ0GUS1kdaQv1M4Dxlq2XHjTI22gscWxp9HwlJ423n/TBlePYrB260Z/77/ly 59Ke+okIH6VsDmbujdyVvQRIro7T6laCq8m272JJ9MbCcwxkFQZnOYqwJYJK7LupUn //E6z/xudr3grcGmfYLjlPKy4AcPOPKVb631kx3g= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 0C79960FB1 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=tbaicar@codeaurora.org From: Tyler Baicar To: christoffer.dall@linaro.org, marc.zyngier@arm.com, pbonzini@redhat.com, rkrcmar@redhat.com, linux@armlinux.org.uk, catalin.marinas@arm.com, will.deacon@arm.com, rjw@rjwysocki.net, lenb@kernel.org, matt@codeblueprint.co.uk, robert.moore@intel.com, lv.zheng@intel.com, nkaje@codeaurora.org, zjzhang@codeaurora.org, mark.rutland@arm.com, james.morse@arm.com, akpm@linux-foundation.org, eun.taik.lee@samsung.com, sandeepa.s.prabhu@gmail.com, labbott@redhat.com, shijie.huang@arm.com, rruigrok@codeaurora.org, paul.gortmaker@windriver.com, tn@semihalf.com, fu.wei@linaro.org, rostedt@goodmis.org, bristot@redhat.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-efi@vger.kernel.org, devel@acpica.org, Suzuki.Poulose@arm.com, punit.agrawal@arm.com, astone@redhat.com, harba@codeaurora.org, hanjun.guo@linaro.org, john.garry@huawei.com, shiju.jose@huawei.com, joe@perches.com, gengdongjiu@huawei.com, xiexiuqi@huawei.com Cc: Tyler Baicar Subject: [PATCH V14 09/10] trace, ras: add ARM processor error trace event Date: Tue, 28 Mar 2017 13:30:39 -0600 Message-Id: <1490729440-32591-10-git-send-email-tbaicar@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1490729440-32591-1-git-send-email-tbaicar@codeaurora.org> References: <1490729440-32591-1-git-send-email-tbaicar@codeaurora.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently there are trace events for the various RAS errors with the exception of ARM processor type errors. Add a new trace event for such errors so that the user will know when they occur. These trace events are consistent with the ARM processor error section type defined in UEFI 2.6 spec section N.2.4.4. Signed-off-by: Tyler Baicar Acked-by: Steven Rostedt Reviewed-by: Xie XiuQi --- drivers/acpi/apei/ghes.c | 8 +++++++- drivers/firmware/efi/cper.c | 1 + drivers/ras/ras.c | 1 + include/ras/ras_event.h | 45 +++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 54 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index 3ecbacc..230b095 100644 --- a/drivers/acpi/apei/ghes.c +++ b/drivers/acpi/apei/ghes.c @@ -515,7 +515,13 @@ static void ghes_do_proc(struct ghes *ghes, } #endif #ifdef CONFIG_RAS - else if (trace_unknown_sec_event_enabled()) { + else if (!uuid_le_cmp(sec_type, CPER_SEC_PROC_ARM) && + trace_arm_event_enabled()) { + struct cper_sec_proc_arm *arm_err; + + arm_err = acpi_hest_generic_data_payload(gdata); + trace_arm_event(arm_err); + } else if (trace_unknown_sec_event_enabled()) { void *unknown_err = acpi_hest_generic_data_payload(gdata); trace_unknown_sec_event(&sec_type, fru_id, fru_text, sec_sev, diff --git a/drivers/firmware/efi/cper.c b/drivers/firmware/efi/cper.c index d263bc8..37a39af 100644 --- a/drivers/firmware/efi/cper.c +++ b/drivers/firmware/efi/cper.c @@ -35,6 +35,7 @@ #include #include #include +#include #define INDENT_SP " " diff --git a/drivers/ras/ras.c b/drivers/ras/ras.c index fb2500b..8ba5a94 100644 --- a/drivers/ras/ras.c +++ b/drivers/ras/ras.c @@ -28,3 +28,4 @@ static int __init ras_init(void) #endif EXPORT_TRACEPOINT_SYMBOL_GPL(mc_event); EXPORT_TRACEPOINT_SYMBOL_GPL(unknown_sec_event); +EXPORT_TRACEPOINT_SYMBOL_GPL(arm_event); diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h index 5861b6f..13befad 100644 --- a/include/ras/ras_event.h +++ b/include/ras/ras_event.h @@ -162,6 +162,51 @@ ); /* + * ARM Processor Events Report + * + * This event is generated when hardware detects an ARM processor error + * has occurred. UEFI 2.6 spec section N.2.4.4. + */ +TRACE_EVENT(arm_event, + + TP_PROTO(const struct cper_sec_proc_arm *proc), + + TP_ARGS(proc), + + TP_STRUCT__entry( + __field(u64, mpidr) + __field(u64, midr) + __field(u32, running_state) + __field(u32, psci_state) + __field(u8, affinity) + ), + + TP_fast_assign( + if (proc->validation_bits & CPER_ARM_VALID_AFFINITY_LEVEL) + __entry->affinity = proc->affinity_level; + else + __entry->affinity = ~0; + if (proc->validation_bits & CPER_ARM_VALID_MPIDR) + __entry->mpidr = proc->mpidr; + else + __entry->mpidr = 0ULL; + __entry->midr = proc->midr; + if (proc->validation_bits & CPER_ARM_VALID_RUNNING_STATE) { + __entry->running_state = proc->running_state; + __entry->psci_state = proc->psci_state; + } else { + __entry->running_state = ~0; + __entry->psci_state = ~0; + } + ), + + TP_printk("affinity level: %d; MPIDR: %016llx; MIDR: %016llx; " + "running state: %d; PSCI state: %d", + __entry->affinity, __entry->mpidr, __entry->midr, + __entry->running_state, __entry->psci_state) +); + +/* * Unknown Section Report * * This event is generated when hardware detected a hardware