From patchwork Wed Apr 26 10:06:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liu, Yi L" X-Patchwork-Id: 9700961 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 91A1C603F4 for ; Wed, 26 Apr 2017 10:23:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6D90D284EE for ; Wed, 26 Apr 2017 10:23:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 62651285F0; Wed, 26 Apr 2017 10:23:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F03FA284EE for ; Wed, 26 Apr 2017 10:23:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2998041AbdDZKXs (ORCPT ); Wed, 26 Apr 2017 06:23:48 -0400 Received: from mga02.intel.com ([134.134.136.20]:50627 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2998038AbdDZKXd (ORCPT ); Wed, 26 Apr 2017 06:23:33 -0400 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Apr 2017 03:23:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,254,1488873600"; d="scan'208";a="79066272" Received: from sky-dev.bj.intel.com ([10.238.145.47]) by orsmga002.jf.intel.com with ESMTP; 26 Apr 2017 03:23:27 -0700 From: "Liu, Yi L" To: qemu-devel@nongnu.org, alex.williamson@redhat.com, peterx@redhat.com Cc: kvm@vger.kernel.org, jasowang@redhat.com, iommu@lists.linux-foundation.org, kevin.tian@intel.com, ashok.raj@intel.com, jacob.jun.pan@intel.com, tianyu.lan@intel.com, yi.l.liu@intel.com, jean-philippe.brucker@arm.com, "Liu, Yi L" Subject: [RFC PATCH 03/20] intel_iommu: add "svm" option Date: Wed, 26 Apr 2017 18:06:33 +0800 Message-Id: <1493201210-14357-4-git-send-email-yi.l.liu@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1493201210-14357-1-git-send-email-yi.l.liu@linux.intel.com> References: <1493201210-14357-1-git-send-email-yi.l.liu@linux.intel.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Expose "Shared Virtual Memory" to guest by using "svm" option. Also use "svm" to expose SVM related capabilities to guest. e.g. "-device intel-iommu, svm=on" Signed-off-by: Liu, Yi L --- hw/i386/intel_iommu.c | 10 ++++++++++ hw/i386/intel_iommu_internal.h | 5 +++++ include/hw/i386/intel_iommu.h | 1 + 3 files changed, 16 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index bf98fa5..ba1e7eb 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2453,6 +2453,7 @@ static Property vtd_properties[] = { DEFINE_PROP_BOOL("x-buggy-eim", IntelIOMMUState, buggy_eim, false), DEFINE_PROP_BOOL("caching-mode", IntelIOMMUState, caching_mode, FALSE), DEFINE_PROP_BOOL("ecs", IntelIOMMUState, ecs, FALSE), + DEFINE_PROP_BOOL("svm", IntelIOMMUState, svm, FALSE), DEFINE_PROP_END_OF_LIST(), }; @@ -2973,6 +2974,15 @@ static void vtd_init(IntelIOMMUState *s) s->ecap |= VTD_ECAP_ECS; } + if (s->svm) { + if (!s->ecs || !x86_iommu->pt_supported || !s->caching_mode) { + error_report("Need to set ecs, pt, caching-mode for svm"); + exit(1); + } + s->cap |= VTD_CAP_DWD | VTD_CAP_DRD; + s->ecap |= VTD_ECAP_PRS | VTD_ECAP_PTS | VTD_ECAP_PASID28; + } + if (s->caching_mode) { s->cap |= VTD_CAP_CM; } diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index 71a1c1e..f2a7d12 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -191,6 +191,9 @@ #define VTD_ECAP_PT (1ULL << 6) #define VTD_ECAP_MHMV (15ULL << 20) #define VTD_ECAP_ECS (1ULL << 24) +#define VTD_ECAP_PASID28 (1ULL << 28) +#define VTD_ECAP_PRS (1ULL << 29) +#define VTD_ECAP_PTS (0xeULL << 35) /* CAP_REG */ /* (offset >> 4) << 24 */ @@ -207,6 +210,8 @@ #define VTD_CAP_PSI (1ULL << 39) #define VTD_CAP_SLLPS ((1ULL << 34) | (1ULL << 35)) #define VTD_CAP_CM (1ULL << 7) +#define VTD_CAP_DWD (1ULL << 54) +#define VTD_CAP_DRD (1ULL << 55) /* Supported Adjusted Guest Address Widths */ #define VTD_CAP_SAGAW_SHIFT 8 diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index ae21fe5..8981615 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -267,6 +267,7 @@ struct IntelIOMMUState { bool caching_mode; /* RO - is cap CM enabled? */ bool ecs; /* Extended Context Support */ + bool svm; /* Shared Virtual Memory */ dma_addr_t root; /* Current root table pointer */ bool root_extended; /* Type of root table (extended or not) */