From patchwork Thu Sep 7 05:54:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dongjiu Geng X-Patchwork-Id: 9941601 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AF827602CC for ; Thu, 7 Sep 2017 05:32:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9E68B283C5 for ; Thu, 7 Sep 2017 05:32:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 92D9B2842A; Thu, 7 Sep 2017 05:32:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 81FE42846F for ; Thu, 7 Sep 2017 05:32:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753374AbdIGFbt (ORCPT ); Thu, 7 Sep 2017 01:31:49 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:5568 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752854AbdIGFbs (ORCPT ); Thu, 7 Sep 2017 01:31:48 -0400 Received: from 172.30.72.58 (EHLO DGGEMS412-HUB.china.huawei.com) ([172.30.72.58]) by dggrg05-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id DGU14463; Thu, 07 Sep 2017 13:31:43 +0800 (CST) Received: from linux.huawei.com (10.67.187.203) by DGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP Server id 14.3.301.0; Thu, 7 Sep 2017 13:31:34 +0800 From: Dongjiu Geng To: , , , , , , , , CC: , , , , Subject: [PATCH] arm64: KVM: VHE: reset PSTATE.UAO when switch to host Date: Thu, 7 Sep 2017 13:54:44 +0800 Message-ID: <1504763684-30128-1-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 1.7.7 MIME-Version: 1.0 X-Originating-IP: [10.67.187.203] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A0B0203.59B0D9C0.017A, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 1611078b5b9dc03d1bad73199cf95939 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In VHE mode, host kernel runs in the EL2 and can enable 'User Access Override' when fs==KERNEL_DS so that it can access kernel memory. However, PSTATE.UAO is set to 0 on an exception taken from EL1 to EL2. Thus when VHE is used and exception taken from a guest UAO will be disabled and host will use the incorrect PSTATE.UAO. So check and reset the PSTATE.UAO when switching to host. Move the reset PSTATE.PAN on entry to EL2 together with PSTATE.UAO reset. Signed-off-by: Dongjiu Geng Signed-off-by: Haibin Zhang Tested-by: Dongjiu Geng --- arch/arm64/kvm/hyp/entry.S | 2 -- arch/arm64/kvm/hyp/switch.c | 12 ++++++++++++ 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kvm/hyp/entry.S b/arch/arm64/kvm/hyp/entry.S index 12ee62d..7662ef5 100644 --- a/arch/arm64/kvm/hyp/entry.S +++ b/arch/arm64/kvm/hyp/entry.S @@ -96,8 +96,6 @@ ENTRY(__guest_exit) add x1, x1, #VCPU_CONTEXT - ALTERNATIVE(nop, SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN) - // Store the guest regs x2 and x3 stp x2, x3, [x1, #CPU_XREG_OFFSET(2)] diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c index a733461..715b3941 100644 --- a/arch/arm64/kvm/hyp/switch.c +++ b/arch/arm64/kvm/hyp/switch.c @@ -22,6 +22,7 @@ #include #include #include +#include static bool __hyp_text __fpsimd_enabled_nvhe(void) { @@ -399,6 +400,17 @@ int __hyp_text __kvm_vcpu_run(struct kvm_vcpu *vcpu) __sysreg_restore_host_state(host_ctxt); + if (has_vhe()) { + /* + * PSTATE was not saved over guest enter/exit, re-enable + * any detecte features that might not have been set + * correctly. + */ + uao_thread_switch(current); + asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), + ARM64_HAS_PAN, CONFIG_ARM64_PAN)); + } + if (fp_enabled) { __fpsimd_save_state(&guest_ctxt->gp_regs.fp_regs); __fpsimd_restore_state(&host_ctxt->gp_regs.fp_regs);