Message ID | 1520007456-85293-2-git-send-email-babu.moger@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Fri, 2 Mar 2018 16:17:56 +0000 From: Babu Moger <babu.moger@amd.com> To: joro@8bytes.org, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org Cc: babu.moger@amd.com, pbonzini@redhat.com, rkrcmar@redhat.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC 1/3] arch/x86/kvm: SVM: Introduce pause filter threshold Date: Fri, 2 Mar 2018 11:17:34 -0500 Message-Id: <1520007456-85293-2-git-send-email-babu.moger@amd.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1520007456-85293-1-git-send-email-babu.moger@amd.com> References: <1520007456-85293-1-git-send-email-babu.moger@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: BN6PR14CA0041.namprd14.prod.outlook.com (10.171.172.155) To BN6PR12MB1761.namprd12.prod.outlook.com (10.175.101.22) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: c5c75642-f93f-4bf6-db71-08d5805928c9 X-Microsoft-Antispam: UriScan:; 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diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h index 78dd9df..7a3d9c7 100644 --- a/arch/x86/include/asm/svm.h +++ b/arch/x86/include/asm/svm.h @@ -60,7 +60,8 @@ struct __attribute__ ((__packed__)) vmcb_control_area { u32 intercept_dr; u32 intercept_exceptions; u64 intercept; - u8 reserved_1[42]; + u8 reserved_1[40]; + u16 pause_filter_thresh; u16 pause_filter_count; u64 iopm_base_pa; u64 msrpm_base_pa; diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index f40d0da..50a4e95 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -4175,6 +4175,8 @@ static void dump_vmcb(struct kvm_vcpu *vcpu) pr_err("%-20s%08x\n", "exceptions:", control->intercept_exceptions); pr_err("%-20s%016llx\n", "intercepts:", control->intercept); pr_err("%-20s%d\n", "pause filter count:", control->pause_filter_count); + pr_err("%-20s%d\n", "pause filter threshold:", + control->pause_filter_thresh); pr_err("%-20s%016llx\n", "iopm_base_pa:", control->iopm_base_pa); pr_err("%-20s%016llx\n", "msrpm_base_pa:", control->msrpm_base_pa); pr_err("%-20s%016llx\n", "tsc_offset:", control->tsc_offset);
This patch adds the support for pause filtering threshold. This feature support is indicated by CPUID Fn8000_000A_EDX. See AMD APM Vol 2 Section 15.14.4 Pause Intercept Filtering for more details In this mode, a 16-bit pause filter threshold field is added in VMCB. The threshold value is a cycle count that is used to reset the pause counter. As with simple pause filtering, VMRUN loads the pause count value from VMCB into an internal counter. Then, on each pause instruction the hardware checks the elapsed number of cycles since the most recent pause instruction against the pause Filter Threshold. If the elapsed cycle count is greater than the pause filter threshold, then the internal pause count is reloaded from VMCB and execution continues. If the elapsed cycle count is less than the pause filter threshold, then the internal pause count is decremented. If the count value is less than zero and pause intercept is enabled, a #VMEXIT is triggered. If advanced pause filtering is supported and pause Filter Threshold field is set to zero, the filter will operate in the simpler, count only mode. Signed-off-by: Babu Moger <babu.moger@amd.com> --- arch/x86/include/asm/svm.h | 3 ++- arch/x86/kvm/svm.c | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-)