diff --git a/x86/access.c b/x86/access.c
index 8f8c228..9412300 100644
--- a/x86/access.c
+++ b/x86/access.c
@@ -171,7 +171,7 @@ typedef struct {
 
 static void ac_test_show(ac_test_t *at);
 
-int write_cr4_checking(unsigned long val)
+static int write_cr4_checking(unsigned long val)
 {
     asm volatile(ASM_TRY("1f")
             "mov %0,%%cr4\n\t"
@@ -179,7 +179,7 @@ int write_cr4_checking(unsigned long val)
     return exception_vector();
 }
 
-void set_cr0_wp(int wp)
+static void set_cr0_wp(int wp)
 {
     unsigned long cr0 = read_cr0();
     unsigned long old_cr0 = cr0;
@@ -191,7 +191,7 @@ void set_cr0_wp(int wp)
         write_cr0(cr0);
 }
 
-unsigned set_cr4_smep(int smep)
+static unsigned set_cr4_smep(int smep)
 {
     unsigned long cr4 = read_cr4();
     unsigned long old_cr4 = cr4;
@@ -212,7 +212,7 @@ unsigned set_cr4_smep(int smep)
     return r;
 }
 
-void set_cr4_pke(int pke)
+static void set_cr4_pke(int pke)
 {
     unsigned long cr4 = read_cr4();
     unsigned long old_cr4 = cr4;
@@ -230,7 +230,7 @@ void set_cr4_pke(int pke)
     write_cr4(cr4);
 }
 
-void set_efer_nx(int nx)
+static void set_efer_nx(int nx)
 {
     unsigned long long efer = rdmsr(MSR_EFER);
     unsigned long long old_efer = efer;
@@ -253,7 +253,7 @@ static void ac_env_int(ac_pool_t *pool)
     pool->pt_pool_current = 0;
 }
 
-void ac_test_init(ac_test_t *at, void *virt)
+static void ac_test_init(ac_test_t *at, void *virt)
 {
     wrmsr(MSR_EFER, rdmsr(MSR_EFER) | EFER_NX_MASK);
     set_cr0_wp(1);
@@ -262,7 +262,7 @@ void ac_test_init(ac_test_t *at, void *virt)
     at->phys = 32 * 1024 * 1024;
 }
 
-int ac_test_bump_one(ac_test_t *at)
+static int ac_test_bump_one(ac_test_t *at)
 {
     at->flags = ((at->flags | invalid_mask) + 1) & ~invalid_mask;
     return at->flags < (1 << NR_AC_FLAGS);
@@ -270,7 +270,7 @@ int ac_test_bump_one(ac_test_t *at)
 
 #define F(x)  ((flags & x##_MASK) != 0)
 
-_Bool ac_test_legal(ac_test_t *at)
+static _Bool ac_test_legal(ac_test_t *at)
 {
     int flags = at->flags;
 
@@ -302,7 +302,7 @@ _Bool ac_test_legal(ac_test_t *at)
     return true;
 }
 
-int ac_test_bump(ac_test_t *at)
+static int ac_test_bump(ac_test_t *at)
 {
     int ret;
 
@@ -312,25 +312,26 @@ int ac_test_bump(ac_test_t *at)
     return ret;
 }
 
-pt_element_t ac_test_alloc_pt(ac_pool_t *pool)
+static pt_element_t ac_test_alloc_pt(ac_pool_t *pool)
 {
     pt_element_t ret = pool->pt_pool + pool->pt_pool_current;
     pool->pt_pool_current += PAGE_SIZE;
     return ret;
 }
 
-_Bool ac_test_enough_room(ac_pool_t *pool)
+static _Bool ac_test_enough_room(ac_pool_t *pool)
 {
     return pool->pt_pool_current + 5 * PAGE_SIZE <= pool->pt_pool_size;
 }
 
-void ac_test_reset_pt_pool(ac_pool_t *pool)
+static void ac_test_reset_pt_pool(ac_pool_t *pool)
 {
     pool->pt_pool_current = 0;
 }
 
-pt_element_t ac_test_permissions(ac_test_t *at, unsigned flags, bool writable,
-                                 bool user, bool executable)
+static pt_element_t ac_test_permissions(ac_test_t *at, unsigned flags,
+                                        bool writable, bool user,
+                                        bool executable)
 {
     bool kwritable = !F(AC_CPU_CR0_WP) && !F(AC_ACCESS_USER);
     pt_element_t expected = 0;
@@ -366,7 +367,7 @@ pt_element_t ac_test_permissions(ac_test_t *at, unsigned flags, bool writable,
     return expected;
 }
 
-void ac_emulate_access(ac_test_t *at, unsigned flags)
+static void ac_emulate_access(ac_test_t *at, unsigned flags)
 {
     bool pde_valid, pte_valid;
     bool user, writable, executable;
@@ -438,7 +439,7 @@ fault:
         at->expected_error &= ~PFERR_FETCH_MASK;
 }
 
-void ac_set_expected_status(ac_test_t *at)
+static void ac_set_expected_status(ac_test_t *at)
 {
     invlpg(at->virt);
 
@@ -460,8 +461,8 @@ void ac_set_expected_status(ac_test_t *at)
     ac_emulate_access(at, at->flags);
 }
 
-void __ac_setup_specific_pages(ac_test_t *at, ac_pool_t *pool, u64 pd_page,
-			       u64 pt_page)
+static void __ac_setup_specific_pages(ac_test_t *at, ac_pool_t *pool,
+				      u64 pd_page, u64 pt_page)
 
 {
     unsigned long root = read_cr3();
@@ -614,7 +615,7 @@ static int pt_match(pt_element_t pte1, pt_element_t pte2, pt_element_t ignore)
     return pte1 == pte2;
 }
 
-int ac_test_do_access(ac_test_t *at)
+static int ac_test_do_access(ac_test_t *at)
 {
     static unsigned unique = 42;
     int fault = 0;
@@ -913,7 +914,7 @@ err:
 	return 0;
 }
 
-int ac_test_exec(ac_test_t *at, ac_pool_t *pool)
+static int ac_test_exec(ac_test_t *at, ac_pool_t *pool)
 {
     int r;
 
@@ -934,7 +935,7 @@ const ac_test_fn ac_test_cases[] =
 	check_smep_andnot_wp
 };
 
-int ac_test_run(void)
+static int ac_test_run(void)
 {
     ac_test_t at;
     ac_pool_t pool;
diff --git a/x86/apic.c b/x86/apic.c
index 013e296..33b0361 100644
--- a/x86/apic.c
+++ b/x86/apic.c
@@ -67,7 +67,7 @@ static void do_write_apicbase(void *data)
     wrmsr(MSR_IA32_APICBASE, *(u64 *)data);
 }
 
-void test_enable_x2apic(void)
+static void test_enable_x2apic(void)
 {
     u64 invalid_state = APIC_DEFAULT_PHYS_BASE | APIC_BSP | APIC_EXTD;
     u64 apic_enabled = APIC_DEFAULT_PHYS_BASE | APIC_BSP | APIC_EN;
@@ -271,7 +271,7 @@ static void test_self_ipi(void)
 
 volatile int nmi_counter_private, nmi_counter, nmi_hlt_counter, sti_loop_active;
 
-void sti_nop(char *p)
+static void sti_nop(char *p)
 {
     asm volatile (
 		  ".globl post_sti \n\t"
@@ -493,7 +493,7 @@ static void test_physical_broadcast(void)
 	report("APIC physical broadcast shorthand", broadcast_received(ncpus));
 }
 
-void wait_until_tmcct_is_zero(uint32_t initial_count, bool stop_when_half)
+static void wait_until_tmcct_is_zero(uint32_t initial_count, bool stop_when_half)
 {
 	uint32_t tmcct = apic_read(APIC_TMCCT);
 
diff --git a/x86/emulator.c b/x86/emulator.c
index 0d88409..c856db4 100644
--- a/x86/emulator.c
+++ b/x86/emulator.c
@@ -54,7 +54,7 @@ static void test_stringio(void)
 	report("outsb down", r == st1[0]);
 }
 
-void test_cmps_one(unsigned char *m1, unsigned char *m3)
+static void test_cmps_one(unsigned char *m1, unsigned char *m3)
 {
 	void *rsi, *rdi;
 	long rcx, tmp;
@@ -128,7 +128,7 @@ void test_cmps_one(unsigned char *m1, unsigned char *m3)
 
 }
 
-void test_cmps(void *mem)
+static void test_cmps(void *mem)
 {
 	unsigned char *m1 = mem, *m2 = mem + 1024;
 	unsigned char m3[1024];
@@ -141,7 +141,7 @@ void test_cmps(void *mem)
 	test_cmps_one(m1, m2);
 }
 
-void test_scas(void *mem)
+static void test_scas(void *mem)
 {
     bool z;
     void *di;
@@ -181,7 +181,7 @@ void test_scas(void *mem)
     report("scasq mismatch", di == mem + 8 && !z);
 }
 
-void test_cr8(void)
+static void test_cr8(void)
 {
 	unsigned long src, dst;
 
@@ -192,7 +192,7 @@ void test_cr8(void)
 	report("mov %%cr8", dst == 3 && src == 3);
 }
 
-void test_push(void *mem)
+static void test_push(void *mem)
 {
 	unsigned long tmp;
 	unsigned long *stack_top = mem + 4096;
@@ -220,7 +220,7 @@ void test_push(void *mem)
 	report("push $imm", stack_top[-4] == -7070707);
 }
 
-void test_pop(void *mem)
+static void test_pop(void *mem)
 {
 	unsigned long tmp, tmp3, rsp, rbp;
 	unsigned long *stack_top = mem + 4096;
@@ -297,7 +297,7 @@ void test_pop(void *mem)
 	       && stack_top[-1] == 0xaa55aa55bb66bb66ULL);
 }
 
-void test_ljmp(void *mem)
+static void test_ljmp(void *mem)
 {
     unsigned char *m = mem;
     volatile int res = 1;
@@ -310,7 +310,7 @@ jmpf:
     report("ljmp", res);
 }
 
-void test_incdecnotneg(void *mem)
+static void test_incdecnotneg(void *mem)
 {
     unsigned long *m = mem, v = 1234;
     unsigned char *mb = mem, vb = 66;
@@ -350,7 +350,7 @@ void test_incdecnotneg(void *mem)
     report("lock notb", *mb == vb);
 }
 
-void test_smsw(uint64_t *h_mem)
+static void test_smsw(uint64_t *h_mem)
 {
 	char mem[16];
 	unsigned short msw, msw_orig, *pmsw;
@@ -377,7 +377,7 @@ void test_smsw(uint64_t *h_mem)
 		(*h_mem & ~0xfffful) == 0x12345678ab0000ul);
 }
 
-void test_lmsw(void)
+static void test_lmsw(void)
 {
 	char mem[16];
 	unsigned short msw, *pmsw;
@@ -406,7 +406,7 @@ void test_lmsw(void)
 	asm("lmsw %0" : : "r"(msw));
 }
 
-void test_xchg(void *mem)
+static void test_xchg(void *mem)
 {
 	unsigned long *memq = mem;
 	unsigned long rax;
@@ -456,7 +456,7 @@ void test_xchg(void *mem)
 	       rax == 0x123456789abcdef && *memq == 0xfedcba9876543210);
 }
 
-void test_xadd(void *mem)
+static void test_xadd(void *mem)
 {
 	unsigned long *memq = mem;
 	unsigned long rax;
@@ -506,7 +506,7 @@ void test_xadd(void *mem)
 	       rax == 0x123456789abcdef && *memq == 0xffffffffffffffff);
 }
 
-void test_btc(void *mem)
+static void test_btc(void *mem)
 {
 	unsigned int *a = mem;
 
@@ -525,7 +525,7 @@ void test_btc(void *mem)
 		a[2] == 0x80000004 && a[3] == 0);
 }
 
-void test_bsfbsr(void *mem)
+static void test_bsfbsr(void *mem)
 {
 	unsigned long rax, *memq = mem;
 	unsigned eax, *meml = mem;
diff --git a/x86/hyperv_clock.c b/x86/hyperv_clock.c
index b72e357..d57591f 100644
--- a/x86/hyperv_clock.c
+++ b/x86/hyperv_clock.c
@@ -48,7 +48,7 @@ static void hvclock_get_time_values(struct hv_reference_tsc_page *shadow,
 	} while (shadow->tsc_sequence != seq);
 }
 
-uint64_t hv_clock_read(void)
+static uint64_t hv_clock_read(void)
 {
 	struct hv_reference_tsc_page shadow;
 
diff --git a/x86/idt_test.c b/x86/idt_test.c
index 349aade..844c860 100644
--- a/x86/idt_test.c
+++ b/x86/idt_test.c
@@ -1,7 +1,7 @@
 #include "libcflat.h"
 #include "desc.h"
 
-int test_ud2(bool *rflags_rf)
+static int test_ud2(bool *rflags_rf)
 {
     asm volatile(ASM_TRY("1f")
                  "ud2 \n\t"
@@ -10,7 +10,7 @@ int test_ud2(bool *rflags_rf)
     return exception_vector();
 }
 
-int test_gp(bool *rflags_rf)
+static int test_gp(bool *rflags_rf)
 {
     unsigned long tmp;
 
diff --git a/x86/pcid.c b/x86/pcid.c
index e3ccfdb..c04fd09 100644
--- a/x86/pcid.c
+++ b/x86/pcid.c
@@ -13,7 +13,7 @@ struct invpcid_desc {
     unsigned long addr : 64;
 };
 
-int write_cr0_checking(unsigned long val)
+static int write_cr0_checking(unsigned long val)
 {
     asm volatile(ASM_TRY("1f")
                  "mov %0, %%cr0\n\t"
@@ -21,7 +21,7 @@ int write_cr0_checking(unsigned long val)
     return exception_vector();
 }
 
-int write_cr4_checking(unsigned long val)
+static int write_cr4_checking(unsigned long val)
 {
     asm volatile(ASM_TRY("1f")
                  "mov %0, %%cr4\n\t"
@@ -29,7 +29,7 @@ int write_cr4_checking(unsigned long val)
     return exception_vector();
 }
 
-int invpcid_checking(unsigned long type, void *desc)
+static int invpcid_checking(unsigned long type, void *desc)
 {
     asm volatile (ASM_TRY("1f")
                   ".byte 0x66,0x0f,0x38,0x82,0x18 \n\t" /* invpcid (%rax), %rbx */
@@ -37,13 +37,13 @@ int invpcid_checking(unsigned long type, void *desc)
     return exception_vector();
 }
 
-void test_cpuid_consistency(int pcid_enabled, int invpcid_enabled)
+static void test_cpuid_consistency(int pcid_enabled, int invpcid_enabled)
 {
     int passed = !(!pcid_enabled && invpcid_enabled);
     report("CPUID consistency", passed);
 }
 
-void test_pcid_enabled(void)
+static void test_pcid_enabled(void)
 {
     int passed = 0;
     ulong cr0 = read_cr0(), cr3 = read_cr3(), cr4 = read_cr4();
@@ -70,7 +70,7 @@ report:
     report("Test on PCID when enabled", passed);
 }
 
-void test_pcid_disabled(void)
+static void test_pcid_disabled(void)
 {
     int passed = 0;
     ulong cr4 = read_cr4();
@@ -85,7 +85,7 @@ report:
     report("Test on PCID when disabled", passed);
 }
 
-void test_invpcid_enabled(void)
+static void test_invpcid_enabled(void)
 {
     int passed = 0;
     ulong cr4 = read_cr4();
@@ -122,7 +122,7 @@ report:
     report("Test on INVPCID when enabled", passed);
 }
 
-void test_invpcid_disabled(void)
+static void test_invpcid_disabled(void)
 {
     int passed = 0;
     struct invpcid_desc desc;
diff --git a/x86/s3.c b/x86/s3.c
index cef956e..da2d00c 100644
--- a/x86/s3.c
+++ b/x86/s3.c
@@ -2,7 +2,7 @@
 #include "x86/acpi.h"
 #include "asm/io.h"
 
-u32* find_resume_vector_addr(void)
+static u32* find_resume_vector_addr(void)
 {
     struct facs_descriptor_rev1 *facs = find_acpi_table_addr(FACS_SIGNATURE);
     if (!facs)
diff --git a/x86/sieve.c b/x86/sieve.c
index 35da34f..8150f2d 100644
--- a/x86/sieve.c
+++ b/x86/sieve.c
@@ -1,7 +1,7 @@
 #include "alloc.h"
 #include "libcflat.h"
 
-int sieve(char* data, int size)
+static int sieve(char* data, int size)
 {
     int i, j, r = 0;
 
@@ -19,7 +19,7 @@ int sieve(char* data, int size)
     return r;
 }
 
-void test_sieve(const char *msg, char *data, int size)
+static void test_sieve(const char *msg, char *data, int size)
 {
     int r;
 
diff --git a/x86/svm.c b/x86/svm.c
index 2350911..701ab2f 100644
--- a/x86/svm.c
+++ b/x86/svm.c
@@ -524,13 +524,13 @@ static void prepare_ioio(struct test *test)
     io_bitmap[8192] = 0xFF;
 }
 
-int get_test_stage(struct test *test)
+static int get_test_stage(struct test *test)
 {
     barrier();
     return test->scratch;
 }
 
-void inc_test_stage(struct test *test)
+static void inc_test_stage(struct test *test)
 {
     barrier();
     test->scratch++;
diff --git a/x86/tsc.c b/x86/tsc.c
index 2268682..f958a91 100644
--- a/x86/tsc.c
+++ b/x86/tsc.c
@@ -2,13 +2,13 @@
 #include "processor.h"
 
 #define CPUID_80000001_EDX_RDTSCP	    (1 << 27)
-int check_cpuid_80000001_edx(unsigned int bit)
+static int check_cpuid_80000001_edx(unsigned int bit)
 {
-    return (cpuid(0x80000001).d & bit) != 0;
+	return (cpuid(0x80000001).d & bit) != 0;
 }
 
 
-void test_wrtsc(u64 t1)
+static void test_wrtsc(u64 t1)
 {
 	u64 t2;
 
@@ -17,7 +17,7 @@ void test_wrtsc(u64 t1)
 	printf("rdtsc after wrtsc(%" PRId64 "): %" PRId64 "\n", t1, t2);
 }
 
-void test_rdtscp(u64 aux)
+static void test_rdtscp(u64 aux)
 {
        u32 ecx;
 
diff --git a/x86/vmexit.c b/x86/vmexit.c
index 000fff1..c12dd24 100644
--- a/x86/vmexit.c
+++ b/x86/vmexit.c
@@ -530,7 +530,7 @@ static void enable_nx(void *junk)
 		wrmsr(MSR_EFER, rdmsr(MSR_EFER) | EFER_NX_MASK);
 }
 
-bool test_wanted(struct test *test, char *wanted[], int nwanted)
+static bool test_wanted(struct test *test, char *wanted[], int nwanted)
 {
 	int i;
 
diff --git a/x86/xsave.c b/x86/xsave.c
index 2d8ca7c..00787bb 100644
--- a/x86/xsave.c
+++ b/x86/xsave.c
@@ -8,7 +8,7 @@
 #define uint64_t unsigned long long
 #endif
 
-int xgetbv_checking(u32 index, u64 *result)
+static int xgetbv_checking(u32 index, u64 *result)
 {
     u32 eax, edx;
 
@@ -21,7 +21,7 @@ int xgetbv_checking(u32 index, u64 *result)
     return exception_vector();
 }
 
-int xsetbv_checking(u32 index, u64 value)
+static int xsetbv_checking(u32 index, u64 value)
 {
     u32 eax = value;
     u32 edx = value >> 32;
@@ -33,7 +33,7 @@ int xsetbv_checking(u32 index, u64 value)
     return exception_vector();
 }
 
-int write_cr4_checking(unsigned long val)
+static int write_cr4_checking(unsigned long val)
 {
     asm volatile(ASM_TRY("1f")
             "mov %0,%%cr4\n\t"
@@ -43,12 +43,12 @@ int write_cr4_checking(unsigned long val)
 
 #define CPUID_1_ECX_XSAVE	    (1 << 26)
 #define CPUID_1_ECX_OSXSAVE	    (1 << 27)
-int check_cpuid_1_ecx(unsigned int bit)
+static int check_cpuid_1_ecx(unsigned int bit)
 {
     return (cpuid(1).c & bit) != 0;
 }
 
-uint64_t get_supported_xcr0(void)
+static uint64_t get_supported_xcr0(void)
 {
     struct cpuid r;
     r = cpuid_indexed(0xd, 0);
@@ -65,7 +65,7 @@ uint64_t get_supported_xcr0(void)
 #define XSTATE_SSE      0x2
 #define XSTATE_YMM      0x4
 
-void test_xsave(void)
+static void test_xsave(void)
 {
     unsigned long cr4;
     uint64_t supported_xcr0;
@@ -143,7 +143,7 @@ void test_xsave(void)
 	xgetbv_checking(XCR_XFEATURE_ENABLED_MASK, &xcr0) == UD_VECTOR);
 }
 
-void test_no_xsave(void)
+static void test_no_xsave(void)
 {
     unsigned long cr4;
     u64 xcr0;
