===================================================================
@@ -5,6 +5,10 @@
struct testdev {
ISADevice dev;
CharDriverState *chr;
+ struct memslot {
+ target_phys_addr_t start;
+ target_phys_addr_t end;
+ } memslot;
};
static void test_device_serial_write(void *opaque, uint32_t addr, uint32_t data)
@@ -90,6 +94,45 @@ static CPUWriteMemoryFunc * const test_i
test_iomem_writel,
};
+#define CMD_CREATE_SLOT 0x0
+#define CMD_DELETE_SLOT 0x1
+
+static void test_device_memslot_write(void *opaque, uint32_t addr, uint32_t data)
+{
+ uint32_t port = addr - 0x2018;
+ struct testdev *dev = opaque;
+
+ switch(port) {
+ case 0:
+ dev->memslot.start = 0;
+ case 4:
+ dev->memslot.start |= (unsigned long)data << (port * 8);
+ break;
+ case 8:
+ dev->memslot.end = 0;
+ case 12:
+ dev->memslot.end |= (unsigned long)data << ((port-8) * 8);
+ break;
+ case 16:
+ if (data == CMD_CREATE_SLOT) {
+ ram_addr_t ram_addr, size;
+
+ size = dev->memslot.end - dev->memslot.start;
+
+ ram_addr = qemu_ram_alloc(size);
+ cpu_register_physical_memory(dev->memslot.start, size, ram_addr);
+ }
+ else if (data == CMD_DELETE_SLOT) {
+ ram_addr_t size = dev->memslot.end - dev->memslot.start;
+
+ cpu_register_physical_memory(dev->memslot.start, size,
+ IO_MEM_UNASSIGNED);
+ }
+ default:
+ break;
+ }
+}
+
static int init_test_device(ISADevice *isa)
{
struct testdev *dev = DO_UPCAST(struct testdev, dev, isa);
@@ -105,6 +148,8 @@ static int init_test_device(ISADevice *i
register_ioport_read(0xe0, 1, 4, test_device_ioport_read, dev);
register_ioport_write(0xe0, 1, 4, test_device_ioport_write, dev);
register_ioport_write(0x2000, 24, 1, test_device_irq_line, NULL);
+ register_ioport_write(0x2018, 20, 4, test_device_memslot_write, dev);
+
iomem_buf = qemu_mallocz(0x10000);
iomem = cpu_register_io_memory(test_iomem_read, test_iomem_write, NULL);
cpu_register_physical_memory(0xff000000, 0x10000, iomem);