@@ -61,9 +61,7 @@ static int pci_grackle_save(QEMUFile* f, void *opaque)
{
PCIDevice *d = opaque;
- pci_device_save(d, f);
-
- return 0;
+ return pci_device_save(d, f);
}
static int pci_grackle_load(QEMUFile* f, void *opaque, int version_id)
@@ -1089,8 +1089,7 @@ static void gt64120_reset(void *opaque)
static int gt64120_save(QEMUFile* f, void *opaque)
{
PCIDevice *d = opaque;
- pci_device_save(d, f);
- return 0;
+ return pci_device_save(d, f);
}
static int gt64120_load(QEMUFile* f, void *opaque, int version_id)
@@ -619,9 +619,14 @@ static void ivshmem_setup_msi(IVShmemState * s) {
static int ivshmem_save(QEMUFile* f, void *opaque)
{
IVShmemState *proxy = opaque;
+ int ret;
IVSHMEM_DPRINTF("ivshmem_save\n");
- pci_device_save(&proxy->dev, f);
+
+ ret = pci_device_save(&proxy->dev, f);
+ if (ret < 0) {
+ return ret;
+ }
if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
msix_save(&proxy->dev, f);
@@ -1102,9 +1102,7 @@ static int openpic_save(QEMUFile* f, void *opaque)
}
#endif
- pci_device_save(&opp->pci_dev, f);
-
- return 0;
+ return pci_device_save(&opp->pci_dev, f);
}
static void openpic_load_IRQ_queue(QEMUFile* f, IRQ_queue_t *q)
@@ -434,16 +434,21 @@ static inline const VMStateDescription *pci_get_vmstate(PCIDevice *s)
return pci_is_express(s) ? &vmstate_pcie_device : &vmstate_pci_device;
}
-void pci_device_save(PCIDevice *s, QEMUFile *f)
+int pci_device_save(PCIDevice *s, QEMUFile *f)
{
+ int ret;
/* Clear interrupt status bit: it is implicit
* in irq_state which we are saving.
* This makes us compatible with old devices
* which never set or clear this bit. */
s->config[PCI_STATUS] &= ~PCI_STATUS_INTERRUPT;
- vmstate_save_state(f, pci_get_vmstate(s), s);
+ ret = vmstate_save_state(f, pci_get_vmstate(s), s);
+ if (ret < 0) {
+ return ret;
+ }
/* Restore the interrupt status bit. */
pci_update_irq_status(s);
+ return 0;
}
int pci_device_load(PCIDevice *s, QEMUFile *f)
@@ -198,7 +198,7 @@ uint32_t pci_default_read_config(PCIDevice *d,
uint32_t address, int len);
void pci_default_write_config(PCIDevice *d,
uint32_t address, uint32_t val, int len);
-void pci_device_save(PCIDevice *s, QEMUFile *f);
+int pci_device_save(PCIDevice *s, QEMUFile *f);
int pci_device_load(PCIDevice *s, QEMUFile *f);
typedef void (*pci_set_irq_fn)(void *opaque, int irq_num, int level);
@@ -71,8 +71,7 @@ static void piix4_reset(void *opaque)
static int piix_save(QEMUFile* f, void *opaque)
{
PCIDevice *d = opaque;
- pci_device_save(d, f);
- return 0;
+ return pci_device_save(d, f);
}
static int piix_load(QEMUFile* f, void *opaque, int version_id)
@@ -301,9 +301,12 @@ static void ppc4xx_pci_set_irq(void *opaque, int irq_num, int level)
static int ppc4xx_pci_save(QEMUFile *f, void *opaque)
{
PPC4xxPCIState *controller = opaque;
- int i;
+ int i, ret;
- pci_device_save(controller->pci_dev, f);
+ ret = pci_device_save(controller->pci_dev, f);
+ if (ret < 0) {
+ return ret;
+ }
for (i = 0; i < PPC4xx_PCI_NR_PMMS; i++) {
qemu_put_be32s(f, &controller->pmm[i].la);
@@ -219,9 +219,12 @@ static void mpc85xx_pci_set_irq(void *opaque, int irq_num, int level)
static int ppce500_pci_save(QEMUFile *f, void *opaque)
{
PPCE500PCIState *controller = opaque;
- int i;
+ int i, ret;
- pci_device_save(controller->pci_dev, f);
+ ret = pci_device_save(controller->pci_dev, f);
+ if (ret < 0) {
+ return ret;
+ }
for (i = 0; i < PPCE500_PCI_NR_POBS; i++) {
qemu_put_be32s(f, &controller->pob[i].potar);
@@ -67,9 +67,7 @@ static int pci_unin_save(QEMUFile* f, void *opaque)
{
PCIDevice *d = opaque;
- pci_device_save(d, f);
-
- return 0;
+ return pci_device_save(d, f);
}
static int pci_unin_load(QEMUFile* f, void *opaque, int version_id)