From patchwork Wed Oct 6 20:59:16 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Williamson X-Patchwork-Id: 237031 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o96KxJvV009753 for ; Wed, 6 Oct 2010 20:59:37 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933073Ab0JFU7V (ORCPT ); Wed, 6 Oct 2010 16:59:21 -0400 Received: from mx1.redhat.com ([209.132.183.28]:31133 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933067Ab0JFU7U (ORCPT ); Wed, 6 Oct 2010 16:59:20 -0400 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o96KxH1T026059 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 6 Oct 2010 16:59:17 -0400 Received: from s20.home (ovpn01.gateway.prod.ext.phx2.redhat.com [10.5.9.1]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id o96KxGG2001739; Wed, 6 Oct 2010 16:59:16 -0400 From: Alex Williamson Subject: [PATCH 3/6] pci: Allow pci_device_save() to return error To: qemu-devel@nongnu.org Cc: kvm@vger.kernel.org, cam@cs.ualberta.ca, quintela@redhat.com, anthony@codemonkey.ws, alex.williamson@redhat.com Date: Wed, 06 Oct 2010 14:59:16 -0600 Message-ID: <20101006205916.32127.2219.stgit@s20.home> In-Reply-To: <20101006204546.32127.70109.stgit@s20.home> References: <20101006204546.32127.70109.stgit@s20.home> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 06 Oct 2010 20:59:37 +0000 (UTC) diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c index f6905fb..c7164c5 100644 --- a/hw/grackle_pci.c +++ b/hw/grackle_pci.c @@ -61,9 +61,7 @@ static int pci_grackle_save(QEMUFile* f, void *opaque) { PCIDevice *d = opaque; - pci_device_save(d, f); - - return 0; + return pci_device_save(d, f); } static int pci_grackle_load(QEMUFile* f, void *opaque, int version_id) diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c index 7d8c3b3..21a0e57 100644 --- a/hw/gt64xxx.c +++ b/hw/gt64xxx.c @@ -1089,8 +1089,7 @@ static void gt64120_reset(void *opaque) static int gt64120_save(QEMUFile* f, void *opaque) { PCIDevice *d = opaque; - pci_device_save(d, f); - return 0; + return pci_device_save(d, f); } static int gt64120_load(QEMUFile* f, void *opaque, int version_id) diff --git a/hw/ivshmem.c b/hw/ivshmem.c index 0919c4e..3726a7f 100644 --- a/hw/ivshmem.c +++ b/hw/ivshmem.c @@ -619,9 +619,14 @@ static void ivshmem_setup_msi(IVShmemState * s) { static int ivshmem_save(QEMUFile* f, void *opaque) { IVShmemState *proxy = opaque; + int ret; IVSHMEM_DPRINTF("ivshmem_save\n"); - pci_device_save(&proxy->dev, f); + + ret = pci_device_save(&proxy->dev, f); + if (ret < 0) { + return ret; + } if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) { msix_save(&proxy->dev, f); diff --git a/hw/openpic.c b/hw/openpic.c index 4ca4ba3..4537239 100644 --- a/hw/openpic.c +++ b/hw/openpic.c @@ -1102,9 +1102,7 @@ static int openpic_save(QEMUFile* f, void *opaque) } #endif - pci_device_save(&opp->pci_dev, f); - - return 0; + return pci_device_save(&opp->pci_dev, f); } static void openpic_load_IRQ_queue(QEMUFile* f, IRQ_queue_t *q) diff --git a/hw/pci.c b/hw/pci.c index 15416dd..a30f6ec 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -434,16 +434,21 @@ static inline const VMStateDescription *pci_get_vmstate(PCIDevice *s) return pci_is_express(s) ? &vmstate_pcie_device : &vmstate_pci_device; } -void pci_device_save(PCIDevice *s, QEMUFile *f) +int pci_device_save(PCIDevice *s, QEMUFile *f) { + int ret; /* Clear interrupt status bit: it is implicit * in irq_state which we are saving. * This makes us compatible with old devices * which never set or clear this bit. */ s->config[PCI_STATUS] &= ~PCI_STATUS_INTERRUPT; - vmstate_save_state(f, pci_get_vmstate(s), s); + ret = vmstate_save_state(f, pci_get_vmstate(s), s); + if (ret < 0) { + return ret; + } /* Restore the interrupt status bit. */ pci_update_irq_status(s); + return 0; } int pci_device_load(PCIDevice *s, QEMUFile *f) diff --git a/hw/pci.h b/hw/pci.h index 3d23f03..bb9ad79 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -198,7 +198,7 @@ uint32_t pci_default_read_config(PCIDevice *d, uint32_t address, int len); void pci_default_write_config(PCIDevice *d, uint32_t address, uint32_t val, int len); -void pci_device_save(PCIDevice *s, QEMUFile *f); +int pci_device_save(PCIDevice *s, QEMUFile *f); int pci_device_load(PCIDevice *s, QEMUFile *f); typedef void (*pci_set_irq_fn)(void *opaque, int irq_num, int level); diff --git a/hw/piix4.c b/hw/piix4.c index 5209061..9f560ac 100644 --- a/hw/piix4.c +++ b/hw/piix4.c @@ -71,8 +71,7 @@ static void piix4_reset(void *opaque) static int piix_save(QEMUFile* f, void *opaque) { PCIDevice *d = opaque; - pci_device_save(d, f); - return 0; + return pci_device_save(d, f); } static int piix_load(QEMUFile* f, void *opaque, int version_id) diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c index 7507d08..3499270 100644 --- a/hw/ppc4xx_pci.c +++ b/hw/ppc4xx_pci.c @@ -301,9 +301,12 @@ static void ppc4xx_pci_set_irq(void *opaque, int irq_num, int level) static int ppc4xx_pci_save(QEMUFile *f, void *opaque) { PPC4xxPCIState *controller = opaque; - int i; + int i, ret; - pci_device_save(controller->pci_dev, f); + ret = pci_device_save(controller->pci_dev, f); + if (ret < 0) { + return ret; + } for (i = 0; i < PPC4xx_PCI_NR_PMMS; i++) { qemu_put_be32s(f, &controller->pmm[i].la); diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c index 9babe05..97a7743 100644 --- a/hw/ppce500_pci.c +++ b/hw/ppce500_pci.c @@ -219,9 +219,12 @@ static void mpc85xx_pci_set_irq(void *opaque, int irq_num, int level) static int ppce500_pci_save(QEMUFile *f, void *opaque) { PPCE500PCIState *controller = opaque; - int i; + int i, ret; - pci_device_save(controller->pci_dev, f); + ret = pci_device_save(controller->pci_dev, f); + if (ret < 0) { + return ret; + } for (i = 0; i < PPCE500_PCI_NR_POBS; i++) { qemu_put_be32s(f, &controller->pob[i].potar); diff --git a/hw/unin_pci.c b/hw/unin_pci.c index ca15a00..28b9836 100644 --- a/hw/unin_pci.c +++ b/hw/unin_pci.c @@ -67,9 +67,7 @@ static int pci_unin_save(QEMUFile* f, void *opaque) { PCIDevice *d = opaque; - pci_device_save(d, f); - - return 0; + return pci_device_save(d, f); } static int pci_unin_load(QEMUFile* f, void *opaque, int version_id)