From patchwork Sun Oct 17 10:14:51 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nadav Har'El X-Patchwork-Id: 259931 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o9HAEwF1019473 for ; Sun, 17 Oct 2010 10:14:59 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932385Ab0JQKOz (ORCPT ); Sun, 17 Oct 2010 06:14:55 -0400 Received: from mtagate6.uk.ibm.com ([194.196.100.166]:56040 "EHLO mtagate6.uk.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932234Ab0JQKOz (ORCPT ); Sun, 17 Oct 2010 06:14:55 -0400 Received: from d06nrmr1407.portsmouth.uk.ibm.com (d06nrmr1407.portsmouth.uk.ibm.com [9.149.38.185]) by mtagate6.uk.ibm.com (8.13.1/8.13.1) with ESMTP id o9HAEsUV011806 for ; Sun, 17 Oct 2010 10:14:54 GMT Received: from d06av01.portsmouth.uk.ibm.com (d06av01.portsmouth.uk.ibm.com [9.149.37.212]) by d06nrmr1407.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id o9HAErhY3772550 for ; Sun, 17 Oct 2010 11:14:53 +0100 Received: from d06av01.portsmouth.uk.ibm.com (loopback [127.0.0.1]) by d06av01.portsmouth.uk.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id o9HAErtt021287 for ; Sun, 17 Oct 2010 11:14:53 +0100 Received: from rice.haifa.ibm.com (rice.haifa.ibm.com [9.148.8.112]) by d06av01.portsmouth.uk.ibm.com (8.12.11.20060308/8.12.11) with ESMTP id o9HAEqQG021278 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Sun, 17 Oct 2010 11:14:53 +0100 Received: from rice.haifa.ibm.com (lnx-nyh.haifa.ibm.com [127.0.0.1]) by rice.haifa.ibm.com (8.14.4/8.14.4) with ESMTP id o9HAEpaf029558; Sun, 17 Oct 2010 12:14:51 +0200 Received: (from nyh@localhost) by rice.haifa.ibm.com (8.14.4/8.14.4/Submit) id o9HAEpXW029556; Sun, 17 Oct 2010 12:14:51 +0200 Date: Sun, 17 Oct 2010 12:14:51 +0200 Message-Id: <201010171014.o9HAEpXW029556@rice.haifa.ibm.com> X-Authentication-Warning: rice.haifa.ibm.com: nyh set sender to "Nadav Har'El" using -f Cc: gleb@redhat.com, avi@redhat.com To: kvm@vger.kernel.org From: "Nadav Har'El" References: <1287309814-nyh@il.ibm.com> Subject: [PATCH 22/27] nVMX: Correct handling of exception injection Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Sun, 17 Oct 2010 10:14:59 +0000 (UTC) --- .before/arch/x86/kvm/vmx.c 2010-10-17 11:52:02.000000000 +0200 +++ .after/arch/x86/kvm/vmx.c 2010-10-17 11:52:03.000000000 +0200 @@ -1498,6 +1498,25 @@ static void skip_emulated_instruction(st vmx_set_interrupt_shadow(vcpu, 0); } +/* + * KVM wants to inject page-faults which it got to the guest. This function + * checks whether in a nested guest, we need to inject them to L1 or L2. + * This function assumes it is called with the exit reason in vmcs02 being + * a #PF exception (this is the only case in which KVM injects a #PF when L2 + * is running). + */ +static int nested_pf_handled(struct kvm_vcpu *vcpu) +{ + struct vmcs_fields *vmcs12 = get_vmcs12_fields(vcpu); + + /* TODO: also check PFEC_MATCH/MASK, not just EB.PF. */ + if (!(vmcs12->exception_bitmap & PF_VECTOR)) + return 0; + + nested_vmx_vmexit(vcpu, false); + return 1; +} + static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr, bool has_error_code, u32 error_code, bool reinject) @@ -1505,6 +1524,10 @@ static void vmx_queue_exception(struct k struct vcpu_vmx *vmx = to_vmx(vcpu); u32 intr_info = nr | INTR_INFO_VALID_MASK; + if (nr == PF_VECTOR && vmx->nested.nested_mode && + nested_pf_handled(vcpu)) + return; + if (has_error_code) { vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code); intr_info |= INTR_INFO_DELIVER_CODE_MASK; @@ -3533,6 +3556,9 @@ static void vmx_inject_nmi(struct kvm_vc { struct vcpu_vmx *vmx = to_vmx(vcpu); + if (vmx->nested.nested_mode) + return; + if (!cpu_has_virtual_nmis()) { /* * Tracking the NMI-blocked state in software is built upon